On 31/10/2010 13:40, Michel Catudal wrote:
Le 2010-10-30 04:20, Chris Jones a écrit :
I'd like to work out whether the debug unit really does break, or
whether there's just a misunderstanding about state between it and
OpenOCD.
Wouldn't pulling the boot pin and send the reset core work?
I would suggest to use the IAR limited version with a small version of
the code and try it out. You are limited at 32k with that version.
You could also ask for a one month try out. With IAR you can use openocd
or the manufacturer's code.
Thanks to Michel for this suggestion and Andreas for pointing out DBGMCU_CR.
Forcing the debug unit clock enable in stop mode completely cures this
problem, but has an unacceptable effect on power consumption (as
expected). It's fine for bench development purposes, though, so that's a
useful step forward.
I tried the IAR software but don't have a JTAG dongle directly
compatible with it. I tried to get it to talk to OpenOCD via GDB but
attempting to download the code to the STM32 that way just resulted in
streams of errors. I didn't spend any more time on this because I don't
think it would help to isolate the issue into or out of OpenOCD.
There seem to be some circumstances in which attempting to start OpenOCD
connected to an STM32 in stop mode, or switching rapidly into and out of
stop mode, breaks the STM32's debug unit. It's consistently repeatable.
For now we can work around it by being extremely careful when we try to
connect OpenOCD, but I'd like to try and help prevent the problem.
Chris
--
Chris Jones - ch...@martin-jones.com
Martin-Jones Technology Ltd
148 Catharine Street, Cambridge, CB1 3AR, UK
Phone +44 (0) 1223 655611 Fax +44 (0) 870 112 3908
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