On Thu, 2012-04-12 at 06:57 +0100, Julius Baxter wrote: > On Thu, Apr 12, 2012 at 6:29 AM, Stefan Kristiansson > <[email protected]> wrote: > > On Thu, Apr 12, 2012 at 05:40:21AM +0100, Julius Baxter wrote: > >> The following should implement and test the correct behaviour of the > >> delay slot execption bit in the supervisor register in the OR1200.
> One thing on the patch, though - do we need to be tracking DSX on > instruction-fetch related exceptions? The _only_ case I can think of > is if a ITLB or IPF occurs on the delay slot when that instruction > goes over a page boundary. Is it useful to know in this case? It > should work but I haven't tested it in the software test. > Yes, we definitely need to track that case. Otherwise we need to use some heuristics based on the value of the PC to figure out which page needs loading... this is what we need to do today and it's ugly. > Also, maybe we don't need to track DSX when doing system calls. > They're not allowed to be in delay slots anyway, so maybe we should be > clearing DSX on l.sys instructions? I think the documentation is wrong on this, too. It documents the value of DSX when l.sys is in a delay slot, but that shouldn't be possible. I think there's simply no need to track for this case. /Jonas
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