On Mon, 2012-10-29 at 17:24 -0400, Peter Gavin wrote: > Hi guys, > > I thought I had already done this some time ago, but I guess it got > misplaced or something like that. I'm not sure. > > In any case, I finished the work for adding or1knd support to or1ksim. > Nodelay mode is turned on by turning on the 0x400 bit in the cpu.cfgr > value in the config file. This involved only a few tiny changes to > the simulator itself; the bulk of the work was making the testsuite > work in either mode. The entire testsuite now passes both with and > without the delay slot. I've run make distcheck, and everything seems > fine.
Hi Peter, Thanks for this. I'll review and look at adding. > I also changed it to use or1k instead of the older or32 architecture name. We're going to need a separate or1k branch. We'll need to keep or32 as the architecture name on the main branch, while that remains the architecture name on the stable tool chain. But all the other patches should apply in both cases. I'll get this set up. > There were some warnings in the testsuite from unused variables and so > on, so there's a patch with some code to suppress those warnings. > > I found a problem in the PCU testcase. It cleared the PCCR register > *before* changing which events are counted. There's a testcase that > counts Icache misses, and in the following test, the PCCR was cleared, > but the instructions that disabled counting Icache misses caused > Icache misses themselves, so the following testcase failed because an > unexpected number of events were counted. I've changed that testcase > to clear the PCCR *after* changing the mode. (I found this problem > after recompiling the code for nodelay mode; the code size is > different so Icache behavior is slightly different.) > > I also regerated the autoconf and automake files (in the final patch). > > The github pull request is here: https://github.com/openrisc/or1ksim/pull/1 Thanks for all the hard work. Best wishes, Jeremy -- Tel: +44 (1590) 610184 Cell: +44 (7970) 676050 SkypeID: jeremybennett Email: [email protected] Web: www.embecosm.com _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
