I was getting ready to do this but as I was working on some other things, I found a bug in the simulator (not one that was introduced by this patch).
The problem is caused by the instruction l.div r1, r2, r3 when r2 = 0x80000000 (INT32_MIN) and r3 = 0xffffffff (-1). Since the result actually overflows a 32-bit integer, this division causes undefined behavior because the result is not representable. (On my machine it raises an FP exception.) We need to check for this case specially, and avoid doing the division. I think we should also change the arch manual to specify that the behavior in this case is similar to what the C standard specifies: "If the quotient a/b is representable, the expression (a/b)*b + a%b shall equal a; otherwise, the behavior of both a/b and a%b is undeļ¬ned." So, basically, we'd treat it just like divide by zero: set the OV flag, and the value written to the register is undefined. -Pete On Fri, Apr 5, 2013 at 1:27 PM, Jeremy Bennett <[email protected]>wrote: > Hi Peter, > > Thanks for all this. This looks good. Please commit them upstream (or > send me a pull request). > > The other thing I would ask is if you can merge them into the OR32 > branch. I know it's not sexy, but most ordinary users are still using > the or32 version, and divergence will just store up nightmares for the > future. I think these commits are all clear of the or32/or1k divide, so > should just apply cleanly. > > Many thanks, > > > Jeremy > > On Thu, 2013-04-04 at 15:34 -0400, Peter Gavin wrote: > > Hi guys, > > > > > > I just pushed some patches to my repo that implement the AECR/AESR > > bits from the new architecture manual for the arithmetic instructions, > > as well as a few other small things. I updated the testsuite to > > match, everything seems to be working correctly. > > > > > > Please review :) > > > > > > https://github.com/pgavin/or1ksim/commits/or1k-master > > > > > > > > -Pete > > _______________________________________________ > > Openrisc mailing list > > [email protected] > > http://lists.opencores.org/listinfo/openrisc > > -- > Tel: +44 (1590) 610184 > Cell: +44 (7970) 676050 > SkypeID: jeremybennett > Email: [email protected] > Web: www.embecosm.com > > _______________________________________________ > OpenRISC mailing list > [email protected] > http://lists.openrisc.net/listinfo/openrisc >
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