On Tue, Dec 4, 2012 at 7:22 AM, Stefan Kristiansson < [email protected]> wrote:
> Actually, reading your message again and giving this some more thought > I kind of see what you mean, if you want to have the register output > ready when you are doing the instruction decoding, you're kind of screwed > since you don't have the register address in the l.nop instruction. > Ideally, you'd connect the RA and RB fields directly from instruction cache's output port to the address port of the register file (assuming synchronous SRAMs). If the nop format was changed so that e.g. bits 20-16 always held the value 3, that would do the trick. -Pete
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