On 02/13/2015 01:02 PM, Hoban, Adrian wrote: >> -----Original Message----- >> From: Steve Gordon [mailto:[email protected]] >> Sent: Wednesday, February 11, 2015 8:49 PM >> To: OpenStack Development Mailing List (not for usage questions) >> Cc: Znoinski, Waldemar >> Subject: Re: [openstack-dev] Testing NUMA, CPU pinning and large pages >> >> ----- Original Message ----- >>> From: "Adrian Hoban" <[email protected]> >>> >>> Hi Folks, >>> >>> I just wanted to share some details on the Intel CI testing strategy for >>> NFV. >>> >>> You will see two Intel CIs commenting: >>> #1: Intel-PCI-CI >>> - Yongli He and Shane Wang are leading this effort for us. >>> - The focus in this environment is on PCIe and SR-IOV specific testing. >>> - Commenting back to review.openstack.org has started. >> >> With regards to SR-IOV / PCI specifically it seemed based on >> https://review.openstack.org/#/c/139000/ and >> https://review.openstack.org/#/c/141270/ that there was still some >> confusion as to where the tests should actually live (and I expect the same >> is >> true for the NUMA, Large Pages, etc. tests). Is this resolved or are there >> still >> open questions? >> >> Thanks, >> >> Steve >> > > Hi Steve, > > The PCIe test code is being put on github at: > https://github.com/intel-hw-ci/Intel-Openstack-Hardware-CI/tree/master/pci_testcases > > We would readily welcome some feedback if folks think it should go elsewhere, > but for now the tests are publically available and we can continue to make > progress.
github seems like a fine choice. The other option would be to create a stackforge repository, which would let people contribute to it through gerrit just like any other openstack or stackforge repo. http://ci.openstack.org/stackforge.html -- Russell Bryant __________________________________________________________________________ OpenStack Development Mailing List (not for usage questions) Unsubscribe: [email protected]?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
