Hi Jon, both RT3050 and RT5350 have MIPS 24Kc core. I have successfully used OpenOCD with similar (not exactly these) chips, having the same MIPS core.
You should use MIPS 4K as a target. At the time I used it extensively I tried to demystify a code that was there and the code I contributed, so I crafted a doc that you can refer to if you are stuck : http://openocd.zylin.com/#/c/904/ (I am sending you a link to the patchset, although it should be merged in the main tree. However, I do not see it there : http://openocd.git.sourceforge.net/git/gitweb.cgi?p=openocd/openocd;a=tree;f=doc/manual;h=8a9121ca13b9286d258a420f4e301b84bad287b7;hb=08ddb19fd3a708d21057c88e8b86215e04c781ec) Anyway, I can confirm that I was capable to load and JTAG debug both low-level code and Linux, having FASTWRITE and I even added coprocessor manipulations from command line (I added this for correct cache handling, so now both soft and hard breaks should work fine). I am very interested to see how this Chinese TOPLINK story develops. Please keep us informed. BR, Drasko On Tue, Apr 16, 2013 at 11:05 PM, jonsm...@gmail.com <jonsm...@gmail.com> wrote: > Does OpenOCD work right on the MIPS core in the RT3050/5350? > Does anyone have a script for initializing DRAM so that I can load in a > uboot binary? > > I should be able to: > 1) use JTAG to init DRAM > 2) copy in the uboot > 3) run it > 4) use it to write itself to flash > > I'm waiting for my hardware to come from China. > > -- > Jon Smirl > jonsm...@gmail.com > > _______________________________________________ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/mailman/listinfo/openwrt-devel > _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
