Sorry, Because I want to use dual-flash solution to enusre the stablility.
You know, we may failed when updating firmware , even worse, sometime we can
not enter the failesafe mode ecxept using TTL console to restore the flash data.
For this issue , I think there must be some incorrect code that I just did not
found.
Another information I can say is , I defined the mtdparts at file
target/linux/ar71xx/image/Makefile
db120_mtd_layout
mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfsA),1408k(kernelA),64k(nvramA),64k(artA)ro;spi0.1:320k(reserved),6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
------------------ ???????? ------------------
??????: "Randy"<[email protected]>;
????????: 2013??9??1??(??????) ????6:39
??????: "OpenWrt Development List"<[email protected]>;
????: Re: [OpenWrt-Devel] ?????? Porting my dual-flash wireless AP,but the
senond flash can not initialized correctly.
would you mind to use a single flash this time. In your log, the second flash's
hardware id can't be regnized.
"??????o" <[email protected]>??????
>Anyone here to help?
>
>
>
>
>------------------ ???????? ------------------
>??????: "??????o";
>????????: 2013??8??30??(??????) ????3:14
>??????: "openwrt-devel";
>????: [OpenWrt-Devel] Porting my dual-flash wireless AP,but the senond
>flash can not initialized correctly.
>
>
>
>Hi all, could you help me with my current issue that my
>dual-flash AP can not initialized the second flash correctly.
>
>
> below is my boot log:
>
>
>
>below is my boot log :
>
>U-boot DB120
>DRAM:
>sri
>Wasp 1.2
>wasp_ddr_initial_config(255): (32bit) ddr2 init
>Setting 0xb8116290 to 0x38702d0f
>128 MB
>
>cpu_pll_cfg: 0x21354
>cpu_pll_dither: 0x3c153f
>CFG_PLL_FREQ: 0x1f
>CFG_HZ : 266500000
>
>CPU Clock: 533MHz DDR Clock: 400MHz
>
>Top of RAM usable for U-Boot at: 88000000
>Reserving 230k for U-Boot at: 87fc4000
>Reserving 192k for malloc() at: 87f94000
>Reserving 44 Bytes for Board Info at: 87f93fd4
>Reserving 44 Bytes for Global Data at: 87f93fa8
>Reserving 128k for boot params() at: 87f73fa8
>Stack Pointer at: 87f73f88
>Now running in RAM - U-Boot at: 87fc4000
>manufacturerId 0xc2, deviceId0 0x20, deviceId1 0x18
>flash size 16MB, sector count = 256
>flash-2 size 16MB, sector count = 256
>Flash: 16 MB
>pci_init_board: PCIe PLL not set for 40MHz refclk
>BOARD IS NOT CALIBRATED!!!
>[eapsw_watchdog::status] warm start
>[eapsw_watchdog::status] boot normally
>[eapsw_watchdog::status] autoswitch enabled=On , times=None
>Current Image was A
>In: serial
>Out: serial
>Err: serial
>Net: ag934x_enet_initialize...
>No valid address in Flash. Using fixed address
>wasp reset mask:10c03300
>WASP ----> F1 PHY *
>: cfg1 0x80000000 cfg2 0x7114
>eth0: 00:03:7f:09:0b:ad
>F1Phy reg init
>ATHR_AUTONEG_ADVERT:1DE1
>ATHR_1000BASET_CONTROL:200
>ATHR_PHY_CONTROL:3100
>ATHRSF1_PHY: Port 5, Neg Success
>ATHRSF1_PHY: unit 0 phy addr 5 eth0 up
>eth0
>Hit any key to stop autoboot: 0
>
>
>## Transferring control to Linux (at address 80060000) ...
>## Giving linux memsize in bytes, 134217728
>
>Starting kernel ...
>
>[ 0.000000] Linux version 3.7.4 (banglang@Ubuntu-Linux) (gcc version
>4.6.4 20121210 (prerelease) (Linaro GCC 4.6-2012.12) ) #831 Fri Aug 30
>11:07:44 HKT 2013
>[ 0.000000] bootconsole [early0] enabled
>[ 0.000000] CPU revision is: 0001974c (MIPS 74Kc)
>[ 0.000000] SoC: Atheros AR9344 rev 2
>[ 0.000000] Clocks: CPU:532.500MHz, DDR:400.000MHz, AHB:200.000MHz,
>Ref:40.000MHz
>[ 0.000000] Determined physical RAM map:
>[ 0.000000] memory: 08000000 @ 00000000 (usable)
>[ 0.000000] Initrd not found or empty - disabling initrd
>[ 0.000000] Zone ranges:
>[ 0.000000] Normal [mem 0x00000000-0x07ffffff]
>[ 0.000000] Movable zone start for each node
>[ 0.000000] Early memory node ranges
>[ 0.000000] node 0: [mem 0x00000000-0x07ffffff]
>[ 0.000000] Primary instruction cache 64kB, VIPT, 4-way, linesize 32
>bytes.
>[ 0.000000] Primary data cache 32kB, 4-way, VIPT, cache aliases,
>linesize 32 bytes
>[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on.
>Total pages: 32512
>[ 0.000000] Kernel command line: board=DB120 console=ttyS0,115200
>mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfsA),1408k(kernelA),64k(nvramA),64k(artA)ro;spi0.1:320k(reserved),6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
>rootfstype=squashfs,jffs2 noinitrd
>[ 0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
>[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536
>bytes)
>[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768
>bytes)
>[ 0.000000] __ex_table already sorted, skipping sort
>[ 0.000000] Writing ErrCtl register=00000000
>[ 0.000000] Readback ErrCtl register=00000000
>[ 0.000000] Memory: 121708k/131072k available (2199k kernel code,
>9364k reserved, 617k data, 4796k init, 0k highmem)
>[ 0.000000] SLUB: Genslabs=9, HWalign=32, Order=0-3, MinObjects=0,
>CPUs=1, Nodes=1
>[ 0.000000] NR_IRQS:51
>[ 0.000000] Calibrating delay loop... 265.42 BogoMIPS (lpj=1327104)
>[ 0.080000] pid_max: default: 32768 minimum: 301
>[ 0.080000] Mount-cache hash table entries: 512
>[ 0.090000] NET: Registered protocol family 16
>[ 0.100000] MIPS: machine is Atheros DB120 reference board
>[ 0.110000] registering PCI controller with io_map_base unset
>[ 0.320000] DB120 :Tymon reg_show show 0x1805002c:0xa000000
>[ 0.320000] DB120 :IMAGE - KERNEL AAAAAAAAAAA
>[ 0.320000] DB120 :mac_init accton mac address
>init:70-72-cf-88-ff-20
>[ 0.330000] bio: create slab <bio-0> at 0
>[ 0.340000] PCI host bridge to bus 0000:00
>[ 0.340000] pci_bus 0000:00: root bus resource [mem
>0x10000000-0x13ffffff]
>[ 0.350000] pci_bus 0000:00: root bus resource [io 0x0000]
>[ 0.350000] pci_bus 0000:00: No busn resource found for root bus,
>will use [bus 00-ff]
>[ 0.360000] pci 0000:00:00.0: invalid calibration data
>[ 0.360000] pci 0000:00:00.0: BAR 0: assigned [mem
>0x10000000-0x1001ffff 64bit]
>[ 0.370000] pci 0000:00:00.0: BAR 6: assigned [mem
>0x10020000-0x1002ffff pref]
>[ 0.370000] pci 0000:00:00.0: using irq 40 for pin 1
>[ 0.380000] Switching to clocksource MIPS
>[ 0.380000] NET: Registered protocol family 2
>[ 0.390000] TCP established hash table entries: 4096 (order: 3,
>32768 bytes)
>[ 0.390000] TCP bind hash table entries: 4096 (order: 2, 16384
>bytes)
>[ 0.400000] TCP: Hash tables configured (established 4096 bind 4096)
>[ 0.400000] TCP: reno registered
>[ 0.410000] UDP hash table entries: 256 (order: 0, 4096 bytes)
>[ 0.410000] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
>[ 0.420000] NET: Registered protocol family 1
>[ 7.200000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
>[ 7.200000] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME)
>(CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
>[ 7.210000] msgmni has been set to 237
>[ 7.220000] io scheduler noop registered
>[ 7.220000] io scheduler deadline registered (default)
>[ 7.230000] Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled
>[ 7.250000] serial8250.0: ttyS0 at MMIO 0x18020000 (irq = 11) is a
>16550A
>[ 7.260000] console [ttyS0] enabled, bootconsole disabled
>[ 7.260000] console [ttyS0] enabled, bootconsole disabled
>[ 7.270000] ath79-spi ath79-spi: master is unqueued, this is
>deprecated
>[ 7.280000] m25p80 spi0.0: found mx25l12805d, expected m25p80
>[ 7.290000] m25p80 spi0.0: mx25l12805d (16384 Kbytes)
>[ 7.290000] 6 cmdlinepart partitions found on MTD device spi0.0
>[ 7.300000] Creating 6 MTD partitions on "spi0.0":
>[ 7.300000] 0x000000000000-0x000000040000 : "u-boot"
>[ 7.310000] 0x000000040000-0x000000050000 : "u-boot-env"
>[ 7.320000] 0x000000050000-0x000000680000 : "rootfsA"
>[ 7.320000] 0x000000680000-0x0000007e0000 : "kernelA"
>[ 7.330000] 0x0000007e0000-0x0000007f0000 : "nvramA"
>[ 7.340000] 0x0000007f0000-0x000000800000 : "artA"
>[ 7.340000] m25p80 spi0.1: found mr25h256, expected m25p80
>[ 7.350000] m25p80 spi0.1: mr25h256 (32 Kbytes)
>[ 7.360000] mtd: spi0.1: partitioning exceeds flash size, truncating
>[ 7.360000] mtd: spi0.1: partitioning exceeds flash size, truncating
>[ 7.370000] mtd: spi0.1: partitioning exceeds flash size, truncating
>[ 7.370000] mtd: spi0.1: partitioning exceeds flash size, truncating
>[ 7.380000] mtd: spi0.1: partitioning exceeds flash size, truncating
>[ 7.390000] mtd: spi0.1: partitioning exceeds flash size, truncating
>[ 7.390000] 6 cmdlinepart partitions found on MTD device spi0.1
>[ 7.400000] Creating 6 MTD partitions on "spi0.1":
>[ 7.400000] 0x000000000000-0x000000008000 : "reserved"
>[ 7.410000] 0x000000008000-0x000000008000 : "rootfs"
>[ 7.420000] mtd: partition "rootfs" is out of reach -- disabled
>[ 7.420000] mtd: partition "rootfs" set to be root filesystem
>[ 7.430000] split_squashfs: no squashfs found in "spi0.1"
>[ 7.440000] 0x000000008000-0x000000008000 : "kernel"
>[ 7.440000] mtd: partition "kernel" is out of reach -- disabled
>[ 7.450000] 0x000000008000-0x000000008000 : "nvram"
>[ 7.450000] mtd: partition "nvram" is out of reach -- disabled
>[ 7.460000] 0x000000008000-0x000000008000 : "art"
>[ 7.470000] mtd: partition "art" is out of reach -- disabled
>[ 7.470000] 0x000000050000-0x000000008000 : "firmware"
>[ 7.480000] mtd: partition "firmware" is out of reach -- disabled
>[ 7.490000] ATHR_GMAC: Length per segment 1536
>[ 7.490000] ATHR_GMAC: fifo cfg 3 01f00140
>[ 7.500000] ATHR_GMAC: RX TASKLET - Pkts per Intr:100
>[ 7.500000] ATHR_GMAC: Mac address for unit:0 addr:0x8795db00
>[ 7.510000] ATHR_GMAC: 70:72:cf:88:ff:20
>[ 8.060000] ATHR_GMAC: Max segments per packet : 1
>[ 8.070000] ATHR_GMAC: Max tx descriptor count : 128
>[ 8.070000] ATHR_GMAC: Max rx descriptor count : 192
>[ 8.080000] ATHR_GMAC: Mac capability flags : 2380
>[ 8.090000] TCP: cubic registered
>[ 8.090000] NET: Registered protocol family 17
>[ 8.090000] 8021q: 802.1Q VLAN Support v1.8
>[ 8.100000] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
>[ 8.130000] Freeing unused kernel memory: 4796k freed
>[ 8.840000] athr_gmac_ring_alloc Allocated 2048 at 0x8781b000
>[ 8.840000] athr_gmac_ring_alloc Allocated 3072 at 0x87809000
>[ 9.150000] WASP ----> F1e PHY
>[ 9.150000] Setting Drop CRC Errors, Pause Frames and Length Error
>frames
>[ 9.160000] Setting PHY...
>[ 9.160000] ATHR_AUTONEG_ADVERT:DE1
>[ 9.160000] ATHR_1000BASET_CONTROL:200
>[ 9.170000] ATHR_PHY_CONTROL:1000
>[ 9.170000] ATHRSF1_PHY: Port 5, Neg Success
>[ 9.180000] ATHRSF1_PHY: unit 0 phy addr 5
>- preinit -
>Press the [f] key and hit [enter] to enter failsafe mode
>- regular preinit -
>[ 12.380000] athr_gmac_ring_free Freeing at 0x8781b000
>[ 12.380000] athr_gmac_ring_free Freeing at 0x87809000
>- init -
>[ 12.720000] Compat-drivers backport release:
>compat-drivers-2013-01-08-3
>[ 12.720000] Backport based on wireless-testing.git master-2013-01-07
>[ 12.730000] compat.git: wireless-testing.git
>[ 12.760000] cfg80211: Calling CRDA to update world regulatory domain
>[ 12.760000] cfg80211: World regulatory domain updated:
>[ 12.770000] cfg80211: (start_freq - end_freq @ bandwidth),
>(max_antenna_gain, max_eirp)
>[ 12.780000] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz),
>(300 mBi, 2000 mBm)
>[ 12.780000] cfg80211: (2457000 KHz - 2482000 KHz @ 20000 KHz),
>(300 mBi, 2000 mBm)
>[ 12.790000] cfg80211: (2474000 KHz - 2494000 KHz @ 20000 KHz),
>(300 mBi, 2000 mBm)
>[ 12.800000] cfg80211: (5170000 KHz - 5250000 KHz @ 40000 KHz),
>(300 mBi, 2000 mBm)
>[ 12.810000] cfg80211: (5735000 KHz - 5835000 KHz @ 40000 KHz),
>(300 mBi, 2000 mBm)
>[ 12.890000] NET: Registered protocol family 10
>[ 13.010000] NAND device: Manufacturer ID: 0xad, Chip ID: 0xf1 (Hynix
>NAND 128MiB 3,3V 8-bit), page size: 2048, OOB size: 64
>[ 13.020000] Scanning device for bad blocks
>[ 13.080000] Bad eraseblock 527 at 0x0000041e0000
>[ 13.110000] Bad eraseblock 756 at 0x000005e80000
>[ 13.220000] ieee80211 phy0: Atheros AR9340 Rev:0 mem=0xb8100000,
>irq=47
>[ 13.230000] PCI: Enabling device 0000:00:00.0 (0000 -> 0002)
>[ 13.330000] ieee80211 phy1: Atheros AR9300 Rev:4 mem=0xb0000000,
>irq=40
>[ 13.330000] cfg80211: Calling CRDA for country: US
>[ 13.340000] cfg80211: Regulatory domain changed to country: US
>[ 13.340000] cfg80211: (start_freq - end_freq @ bandwidth),
>(max_antenna_gain, max_eirp)
>[ 13.350000] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz),
>(300 mBi, 2700 mBm)
>[ 13.360000] cfg80211: (5170000 KHz - 5250000 KHz @ 40000 KHz),
>(300 mBi, 1700 mBm)
>[ 13.370000] cfg80211: (5250000 KHz - 5330000 KHz @ 40000 KHz),
>(300 mBi, 2000 mBm)
>[ 13.380000] cfg80211: (5490000 KHz - 5600000 KHz @ 40000 KHz),
>(300 mBi, 2000 mBm)
>[ 13.380000] cfg80211: (5650000 KHz - 5710000 KHz @ 40000 KHz),
>(300 mBi, 2000 mBm)
>[ 13.390000] cfg80211: (5735000 KHz - 5835000 KHz @ 40000 KHz),
>(300 mBi, 3000 mBm)
>[ 13.450000] PPP generic driver version 2.4.2
>[ 13.520000] ip_tables: (C) 2000-2006 Netfilter Core Team
>[ 13.620000] NET: Registered protocol family 24
>[ 13.640000] nf_conntrack version 0.5.0 (1976 buckets, 7904 max)
>[ 13.970000] xt_time: kernel timezone is -0000
>[ 14.220000] u32 classifier
>[ 14.220000] Performance counters on
>[ 14.220000] input device check on
>[ 14.230000] Actions configured
>[ 14.250000] Mirror/redirect action on
>
>
>
>
>
>
>
>Any suggestion will be appreciated.
>
>
>
>
>
>
>
>
>
>
>The part of my source code is :
>
>static void __init db120_setup(void)
>
>{
>
> u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
>
>...........
>
> //ath79_register_m25p80(NULL);
>
> ath79_register_m25p80_multi(NULL);
>
>
>
> xxxx
>
>.........
>
>}
>
>------------------------------------------------------------------------
>
>_______________________________________________
>openwrt-devel mailing list
>[email protected]
>https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
--
Randy
_______________________________________________
openwrt-devel mailing list
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