Hey, I obviously could not test any of that Xilinx but I have verified these patches do not break other console logic on QEMU with TCG and KVM and Firecracker.
Otherwise, your changes look good, so I have committed it. Waldek On Thursday, March 11, 2021 at 12:15:01 PM UTC-5 [email protected] wrote: > This work is part of an effort to port OSv to LynxSecure hypervisor. I've > tested this running on LynxSecure with the UART passed through, both on > real > hardware (ZCU102) and the Xilinx qemu model of the ZCU102 with emulated > Cadence > UART. I also did a test on qemu-system-aarch64 (without Cadence UART) to > ensure > it doesn't break backward compatibility. > > Stewart Hildebrand (4): > Introduce Cadence UART driver > Cadence: add device tree parsing function > Cadence: initialize from device tree > Cadence: add barrier > > Makefile | 1 + > arch/aarch64/arch-dtb.cc | 40 +++++++++ > arch/aarch64/arch-dtb.hh | 8 ++ > arch/aarch64/arch-setup.cc | 17 ++++ > arch/aarch64/early-console.hh | 2 + > drivers/cadence-uart.cc | 148 ++++++++++++++++++++++++++++++++++ > drivers/cadence-uart.hh | 45 +++++++++++ > 7 files changed, 261 insertions(+) > create mode 100644 drivers/cadence-uart.cc > create mode 100644 drivers/cadence-uart.hh > > -- > 2.30.2 > > -- You received this message because you are subscribed to the Google Groups "OSv Development" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/osv-dev/63f8abe4-2526-4047-b592-88b54160bfd7n%40googlegroups.com.
