________ Brian G.
----- Original Message ----- From: "Ian Wilson" <[EMAIL PROTECTED]>
To: "Protel EDA Discussion List" <[EMAIL PROTECTED]>
Sent: Wednesday, November 24, 2004 12:08 AM
Subject: Re: SOLVED! Re: [PEDA] Problem updating designators / pin swapping
On 03:18 PM 24/11/2004, Matt Polak said:At 04:19 PM 11/23/2004, you wrote:
My question would be simply: What is the recommended procedure for updating the PCB's components and netlist when gate-swapping between parts in the schematics set under DXP? Are there any hints or gotcha's to watch out for?
Never mind - turns out the footprint libraries somehow got unloaded in the working process! Doh! Everything is happy now.
By the by, DXP2004 has been touting pin and gate-swapping as part of the new package. Has anyone used it yet who can comment on it being a useful (and working) feature?
Thanks for your comments on this one, Ian! I definitely wish there were a little easier way to just say "Here, ALL of *these* FPGA pins are GPIO and can be swapped on the fly. Let me connect the currently routing net trace to any one of THESE pins." so routing would be easier, or similar. I guess I won't be thinking of switching to DXP2004 any time soon - we just figured out most of the insanity with the 99SE to DXP transition in the past few months!
If you are using DXP then it is pretty much a no-brainer to switch to P2004 (with one small exception that I know of, and even then I would go back to DXP only when I needed to). There are way too many improvements in P2004, and the forthcoming SP2, to ignore. All registered DXP owners should have received P2004 as a free upgrade.
If you want pin swapping on FPGAs without doing an underlying FPGA project in P2004 (or Nexar), I suspect this would not be too hard to arrange - just do a dummy FPGA project which sets out the appropriate swap groups and it should work OK - as long as you are using one of the supported FPGAs. The PCB changes can then be pushed back to the Sch, if you are prepared to use auto-generated FPGA sheet that is created when linking an PrjFPGA to a PrjPCB.
So, there may be some helpful work-arounds that could be done to help with pin swapping on FPGAs even if your FPGA is not being designed in the P2004/Nexar environment - haven't thought about it in detail. Others on the DXP forum may have some ideas about this.
(The only exception, I can think of to go back to DXP, is that P2004 no longer includes support for CUPL for simple PLDs.)
Ian
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