On Fri, Jul 18, 2008 at 12:23 AM, Corey J Ashford <[EMAIL PROTECTED]> wrote: > I think I understand what you are saying. POWER doesn't have a stop_save > function, but it does have something similar. I will see if I can figure > out how to make the right thing happen during pfm_stop_active, rather than > during pfm_restore_pmds. > Yes, because after your equivalent to stop_save, you have recorded enough information about the potiential past or in-flight interrupts, so you can destroy the state.
> - Corey > > Corey Ashford > Software Engineer > IBM Linux Technology Center, Linux Toolchain > Beaverton, OR > 503-578-3507 > [EMAIL PROTECTED] > > > "stephane eranian" <[EMAIL PROTECTED]> wrote on 07/17/2008 03:06:22 PM: > >> Corey, >> >> On Thu, Jul 17, 2008 at 11:29 PM, Corey J Ashford <[EMAIL PROTECTED]> >> wrote: >> > Hi Stephane, >> > >> > Sorry, the subject line was a bit long, but it is for POWER. >> > >> > Well, the problem is that we do only check the used PMDs for overflows >> > in >> > pfm_power6_get_ovfl_pmds (called from pfm_stop_active, called from >> > pfm_arch_stop), but when we switch to another set, those counters may or >> > may >> > not be used in the new set. So the unused counters retain the values >> > they >> > had from the previous set, and they may have actually overflowed by a >> > few >> > counts. pfm_arch_restore_pmds only restores the registers that are used >> > in >> > the new set, leaving the unused counters at whatever value they were in >> > the >> > previous set. If one or more of those counters overflow, the interrupt >> > handler will ignore those overflowing registers because they are tagged >> > as >> > unused, and the interrupt handler will return without having cleared the >> > condition that's causing the interrupt.... resulting in re-entering the >> > interrupt handler again and again. >> > >> I see, now I understand your problem. Then it seems in your case, >> stop_save >> should systemically clear the overflowed registers or clear the >> overflow condition. >> Remember that if there was an in-flight interrupt, stop_save keeps >> enough state >> that on context switch, the interrupt will be replayed. So there is no >> risk of losing >> interrupts. >> >> Does this make sense? >> >> >> > Just for clarity's sake, POWER does not have individual interrupt >> > interrupt >> > enable/disable on each of the counters. There are two bits - one >> > enables/disables interrupts on counter 1, and the other bit >> > enables/disables >> > interrupts on counters 2,3,4. So it's not just a matter of disabling >> > interrupts on the unused counters. In fact, the current implementation >> > for >> > POWER6 leaves those two bits on all of the time. >> > > ------------------------------------------------------------------------- This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK & win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100&url=/ _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
