"stephane eranian" <[EMAIL PROTECTED]> wrote on 07/17/2008 03:25:01
PM:
> On Fri, Jul 18, 2008 at 12:23 AM, Corey J Ashford <[EMAIL PROTECTED]>
wrote:
> > I think I understand what you are saying. POWER doesn't have a
stop_save
> > function, but it does have something similar. I will see if I can
figure
> > out how to make the right thing happen during pfm_stop_active, rather
than
> > during pfm_restore_pmds.
> >
> Yes, because after your equivalent to stop_save, you have recorded
> enough information
> about the potiential past or in-flight interrupts, so you can
> destroy the state.
Except that the counter registers will be changed after calling
pfm_arch_stop and the next thing that's done, in the case of
pfm_switch_sets, is to call pfm_save_pmds, which would save the zeroed PMDs
that had been overflowed? Here's the code excerpt:
...
if (is_active) {
pfm_arch_stop(current, ctx);
pfm_save_pmds(ctx, set);
/*
* compute elapsed ns for active set
*/
set->duration += now - set->duration_start;
}
...
It would seem that if I were to do what you are suggesting, I'd have to
handle the overflowed counters as if they were interrupts in
pfm_stop_active. It's not clear to me that the system would be in a good
state to do the full interrupt processing at that time. If interrupt
processing during a set switch is possible, would you suggest doing that?
perfmon/perfmon_intr.c:pfm_intr_process_64bit() looks at both the
npend_ovfls variable and the contents of the registers to process the
overflows correctly. So, I think that means that if I hope to do the
pending interrupt processing at the time of the pfm_restore_pmds, that PMD
registers still must contain the overflowed values, which means that when
we return from pfm_stop_active, the PMD registers cannot be zeroed (or even
just have their overflow bit turned off).
Any thoughts?
- Corey
Corey Ashford
Software Engineer
IBM Linux Technology Center, Linux Toolchain
Beaverton, OR
503-578-3507
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