On Thu, 2010-04-08 at 23:18 +0200, Stephane Eranian wrote: > I am not sure I understand what you mean by buffered PEBS. Are you talking > about using PEBS buffer bigger than one entry?
Yep. > If so, how can you do: > - the LBR based fixups for multiple samples (on PMU interrupt) Not, so it would be the offset on. > - attribute PID/TID in system-wide mode flush on context switches. ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
