On Thu, Oct 24, 2013 at 11:01 PM, Vince Weaver <vincent.wea...@maine.edu> wrote: > On Wed, 23 Oct 2013, Stephane Eranian wrote: > >> On Tue, Oct 22, 2013 at 1:45 AM, Vince Weaver <vincent.wea...@maine.edu> >> wrote: >> > On Mon, 21 Oct 2013, William Cohen wrote: >> > >> >> Yes, armv8_pmuv3 seems a bit verbose. The kernel has similar naming in >> >> arch/arm64/kernel/perf_events.c Would it be sane just to group arm >> >> performance counters as arm_pmuvN, where N is 1, 2, or 3? >> > >> > well, the issue is we support counters that pre-date pmuv1. >> > >> Why is the separation between v7 and v8 enough? >> In other words, why not just call it arm8_pmu? Or pmuv1. >> What surprises me is the v3. > > Well it's the distinction between architecture and implementation. > > We have > armv6: various > armv7_pmuv1: Cortex A8/Cortex A9 > armv7_pmuv2: Cortex A15 (support for kernel/user distinction) > armv8_pmuv3: ?? So far all arm64 > I was expecting arm8_pmuv1, i.e., first implementation of ARMV8 PMU. That is why I was asking the question. I understand why it is v1, v2 for the V7.
> So the question is how do we separate the files. Currently we > have armv6 and armv7_pmuv1 (which contains both pmuv1 and pmuv2). > > We could just rename things and just have armv6, armv7, armv8 and leave > it at that, and not even mention the pmu version at all. > > Vince ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60135991&iu=/4140/ostg.clktrk _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
