On Thu, Jul 19, 2012 at 2:29 AM, Justin Piszcz <[email protected]> wrote:
> Hi, > > I am working with Supermicro, the X9SCM-F is a special board in that: > > SM: "Please note the X7 have power saving stage at C3 whereas for X9 > it has c7. All these add-on feature we suspect may accounted for the > drift/offset as well." > > I am working with them to see what the next steps are to fix the > problem if possible. > > Justin. Final e-mail: All Xeons are built with internal Power Saving feature. How and when this power saving mode in the CPU activate or kick in we have no control. Especially the more advanced CPU they have more features and powering mode added. Hence I would prefer that you keep to the advice provided by : https://lists.ntp.org/pipermail/pool/2012-July/006025.html in your previous email. Thanks and regards, SM _______________________________________________ pool mailing list [email protected] http://lists.ntp.org/listinfo/pool
