Re-merge the -msave-args diff plus fix and add a diff to make use
of pthread_get_name_np.
Index: Makefile
===================================================================
RCS file: /home/cvs/ports/devel/llvm/Makefile,v
retrieving revision 1.210
diff -u -p -u -p -r1.210 Makefile
--- Makefile 3 Feb 2019 18:29:48 -0000 1.210
+++ Makefile 4 Feb 2019 22:22:21 -0000
@@ -20,7 +20,7 @@ PKGSPEC-main = llvm-=${LLVM_V}
PKGNAME-main = llvm-${LLVM_V}
PKGNAME-python = py-llvm-${LLVM_V}
PKGNAME-lldb = lldb-${LLVM_V}
-REVISION-main = 3
+REVISION-main = 4
CATEGORIES = devel
DISTFILES = llvm-${LLVM_V}.src${EXTRACT_SUFX} \
cfe-${LLVM_V}.src${EXTRACT_SUFX} \
Index: patches/patch-include_llvm_BinaryFormat_Dwarf_def
===================================================================
RCS file: patches/patch-include_llvm_BinaryFormat_Dwarf_def
diff -N patches/patch-include_llvm_BinaryFormat_Dwarf_def
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-include_llvm_BinaryFormat_Dwarf_def 5 Feb 2019 00:34:58
-0000
@@ -0,0 +1,16 @@
+$OpenBSD: patch-include_llvm_BinaryFormat_Dwarf_def,v 1.1 2019/01/31 13:40:22
jca Exp $
+
+implement -msave-args in clang/llvm, like the sun did for gcc
+
+Index: include/llvm/BinaryFormat/Dwarf.def
+--- include/llvm/BinaryFormat/Dwarf.def.orig
++++ include/llvm/BinaryFormat/Dwarf.def
+@@ -355,6 +355,8 @@ HANDLE_DW_AT(0x2133, GNU_addr_base, 0, GNU)
+ HANDLE_DW_AT(0x2134, GNU_pubnames, 0, GNU)
+ HANDLE_DW_AT(0x2135, GNU_pubtypes, 0, GNU)
+ HANDLE_DW_AT(0x2136, GNU_discriminator, 0, GNU)
++// Sun Extension
++HANDLE_DW_AT(0x2224, SUN_amd64_parmdump, 0, GNU)
+ // Borland extensions.
+ HANDLE_DW_AT(0x3b11, BORLAND_property_read, 0, BORLAND)
+ HANDLE_DW_AT(0x3b12, BORLAND_property_write, 0, BORLAND)
Index: patches/patch-lib_Support_Unix_Threading_inc
===================================================================
RCS file: patches/patch-lib_Support_Unix_Threading_inc
diff -N patches/patch-lib_Support_Unix_Threading_inc
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-lib_Support_Unix_Threading_inc 4 Feb 2019 22:28:22
-0000
@@ -0,0 +1,20 @@
+$OpenBSD$
+
+Make use of pthread_get_name_np() to retrieve the thread name.
+
+Index: lib/Support/Unix/Threading.inc
+--- lib/Support/Unix/Threading.inc.orig
++++ lib/Support/Unix/Threading.inc
+@@ -203,6 +203,12 @@ void llvm::get_thread_name(SmallVectorImpl<char> &Name
+ ::pthread_getname_np(::pthread_self(), buf, len);
+
+ Name.append(buf, buf + strlen(buf));
++#elif defined(__OpenBSD__)
++ constexpr uint32_t len = get_max_thread_name_length_impl();
++ char buf[len];
++ ::pthread_get_name_np(::pthread_self(), buf, len);
++
++ Name.append(buf, buf + strlen(buf));
+ #elif defined(__linux__)
+ #if HAVE_PTHREAD_GETNAME_NP
+ constexpr uint32_t len = get_max_thread_name_length_impl();
Index: patches/patch-lib_Target_X86_X86FrameLowering_cpp
===================================================================
RCS file:
/home/cvs/ports/devel/llvm/patches/patch-lib_Target_X86_X86FrameLowering_cpp,v
retrieving revision 1.5
diff -u -p -u -p -r1.5 patch-lib_Target_X86_X86FrameLowering_cpp
--- patches/patch-lib_Target_X86_X86FrameLowering_cpp 3 Feb 2019 18:29:48
-0000 1.5
+++ patches/patch-lib_Target_X86_X86FrameLowering_cpp 5 Feb 2019 00:34:58
-0000
@@ -1,4 +1,4 @@
-$OpenBSD: patch-lib_Target_X86_X86FrameLowering_cpp,v 1.5 2019/02/03 18:29:48
jca Exp $
+$OpenBSD: patch-lib_Target_X86_X86FrameLowering_cpp,v 1.4 2019/01/31 13:40:22
jca Exp $
- Add RETGUARD to clang for amd64. This security mechanism uses per-function
random cookies to protect access to function return instructions, with the
@@ -18,6 +18,7 @@ $OpenBSD: patch-lib_Target_X86_X86FrameL
jumping into the instruction stream partway through other instructions. Work
to
remove these gadgets will continue through other mechanisms.
- Refactor retguard to make adding additional arches easier.
+- implement -msave-args in clang/llvm, like the sun did for gcc
Index: lib/Target/X86/X86FrameLowering.cpp
--- lib/Target/X86/X86FrameLowering.cpp.orig
@@ -39,7 +40,153 @@ Index: lib/Target/X86/X86FrameLowering.c
// Cache a bunch of frame-related predicates for this subtarget.
SlotSize = TRI->getSlotSize();
Is64Bit = STI.is64Bit();
-@@ -3153,4 +3154,8 @@ void X86FrameLowering::processFunctionBeforeFrameFinal
+@@ -47,6 +48,7 @@ X86FrameLowering::X86FrameLowering(const X86Subtarget
+ // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
+ Uses64BitFramePtr = STI.isTarget64BitLP64() || STI.isTargetNaCl64();
+ StackPtr = TRI->getStackRegister();
++ SaveArgs = Is64Bit ? STI.getSaveArgs() : 0;
+ }
+
+ bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
+@@ -90,7 +92,8 @@ bool X86FrameLowering::hasFP(const MachineFunction &MF
+ MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
+ MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
+ MFI.hasStackMap() || MFI.hasPatchPoint() ||
+- MFI.hasCopyImplyingStackAdjustment());
++ MFI.hasCopyImplyingStackAdjustment() ||
++ SaveArgs);
+ }
+
+ static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
+@@ -871,6 +874,24 @@ void X86FrameLowering::BuildStackAlignAND(MachineBasic
+ MI->getOperand(3).setIsDead();
+ }
+
++// FIXME: Get this from tablegen.
++static ArrayRef<MCPhysReg> get64BitArgumentGPRs(CallingConv::ID CallConv,
++ const X86Subtarget
&Subtarget) {
++ assert(Subtarget.is64Bit());
++
++ if (Subtarget.isCallingConvWin64(CallConv)) {
++ static const MCPhysReg GPR64ArgRegsWin64[] = {
++ X86::RCX, X86::RDX, X86::R8, X86::R9
++ };
++ return makeArrayRef(std::begin(GPR64ArgRegsWin64),
std::end(GPR64ArgRegsWin64));
++ }
++
++ static const MCPhysReg GPR64ArgRegs64Bit[] = {
++ X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
++ };
++ return makeArrayRef(std::begin(GPR64ArgRegs64Bit),
std::end(GPR64ArgRegs64Bit));
++}
++
+ /// emitPrologue - Push callee-saved registers onto the stack, which
+ /// automatically adjust the stack pointer. Adjust the stack pointer to
allocate
+ /// space for local variables. Also emit labels used by the exception handler
to
+@@ -1153,6 +1174,43 @@ void X86FrameLowering::emitPrologue(MachineFunction &M
+ nullptr, DwarfFramePtr));
+ }
+
++ if (SaveArgs && !Fn.arg_empty()) {
++ ArrayRef<MCPhysReg> GPRs =
++ get64BitArgumentGPRs(Fn.getCallingConv(), STI);
++ unsigned arg_size = Fn.arg_size();
++ unsigned RI = 0;
++ int64_t SaveSize = 0;
++
++ if (Fn.hasStructRetAttr()) {
++ GPRs = GPRs.drop_front(1);
++ arg_size--;
++ }
++
++ for (MCPhysReg Reg : GPRs) {
++ if (++RI > arg_size)
++ break;
++
++ SaveSize += SlotSize;
++
++ BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
++ .addReg(Reg)
++ .setMIFlag(MachineInstr::FrameSetup);
++ }
++
++ // Realign the stack. PUSHes are the most space efficient.
++ while (SaveSize % getStackAlignment()) {
++ BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
++ .addReg(GPRs.front())
++ .setMIFlag(MachineInstr::FrameSetup);
++
++ SaveSize += SlotSize;
++ }
++
++ //dlg StackSize -= SaveSize;
++ //dlg MFI.setStackSize(StackSize);
++ X86FI->setSaveArgSize(SaveSize);
++ }
++
+ if (NeedsWinFPO) {
+ // .cv_fpo_setframe $FramePtr
+ HasWinCFI = true;
+@@ -1618,20 +1676,6 @@ void X86FrameLowering::emitEpilogue(MachineFunction &M
+ }
+ uint64_t SEHStackAllocAmt = NumBytes;
+
+- if (HasFP) {
+- // Pop EBP.
+- BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
+- MachineFramePtr)
+- .setMIFlag(MachineInstr::FrameDestroy);
+- if (NeedsDwarfCFI) {
+- unsigned DwarfStackPtr =
+- TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true);
+- BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfa(
+- nullptr, DwarfStackPtr, -SlotSize));
+- --MBBI;
+- }
+- }
+-
+ MachineBasicBlock::iterator FirstCSPop = MBBI;
+ // Skip the callee-saved pop instructions.
+ while (MBBI != MBB.begin()) {
+@@ -1701,6 +1745,28 @@ void X86FrameLowering::emitEpilogue(MachineFunction &M
+ --MBBI;
+ }
+
++ if (HasFP) {
++ MBBI = Terminator;
++
++ if (X86FI->getSaveArgSize()) {
++ // LEAVE is effectively mov rbp,rsp; pop rbp
++ BuildMI(MBB, MBBI, DL, TII.get(X86::LEAVE64), MachineFramePtr)
++ .setMIFlag(MachineInstr::FrameDestroy);
++ } else {
++ // Pop EBP.
++ BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
++ MachineFramePtr)
++ .setMIFlag(MachineInstr::FrameDestroy);
++ }
++ if (NeedsDwarfCFI) {
++ unsigned DwarfStackPtr =
++ TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true);
++ BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfa(
++ nullptr, DwarfStackPtr, -SlotSize));
++ --MBBI;
++ }
++ }
++
+ // Windows unwinder will not invoke function's exception handler if IP is
+ // either in prologue or in epilogue. This behavior causes a problem when a
+ // call immediately precedes an epilogue, because the return address points
+@@ -1789,6 +1855,8 @@ int X86FrameLowering::getFrameIndexReference(const Mac
+ "FPDelta isn't aligned per the Win64 ABI!");
+ }
+
++ if (FI >= 0)
++ Offset -= X86FI->getSaveArgSize();
+
+ if (TRI->hasBasePointer(MF)) {
+ assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
+@@ -3153,4 +3221,8 @@ void X86FrameLowering::processFunctionBeforeFrameFinal
addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),
UnwindHelpFI)
.addImm(-2);
Index: patches/patch-lib_Target_X86_X86FrameLowering_h
===================================================================
RCS file:
/home/cvs/ports/devel/llvm/patches/patch-lib_Target_X86_X86FrameLowering_h,v
retrieving revision 1.4
diff -u -p -u -p -r1.4 patch-lib_Target_X86_X86FrameLowering_h
--- patches/patch-lib_Target_X86_X86FrameLowering_h 3 Feb 2019 18:29:48
-0000 1.4
+++ patches/patch-lib_Target_X86_X86FrameLowering_h 5 Feb 2019 00:34:58
-0000
@@ -1,4 +1,4 @@
-$OpenBSD: patch-lib_Target_X86_X86FrameLowering_h,v 1.4 2019/02/03 18:29:48
jca Exp $
+$OpenBSD: patch-lib_Target_X86_X86FrameLowering_h,v 1.3 2019/01/31 13:40:22
jca Exp $
- Add RETGUARD to clang for amd64. This security mechanism uses per-function
random cookies to protect access to function return instructions, with the
@@ -18,6 +18,7 @@ $OpenBSD: patch-lib_Target_X86_X86FrameL
jumping into the instruction stream partway through other instructions. Work
to
remove these gadgets will continue through other mechanisms.
- Refactor retguard to make adding additional arches easier.
+- implement -msave-args in clang/llvm, like the sun did for gcc
Index: lib/Target/X86/X86FrameLowering.h
--- lib/Target/X86/X86FrameLowering.h.orig
@@ -38,15 +39,18 @@ Index: lib/Target/X86/X86FrameLowering.h
class X86FrameLowering : public TargetFrameLowering {
public:
-@@ -33,6 +35,7 @@ class X86FrameLowering : public TargetFrameLowering {
+@@ -33,7 +35,10 @@ class X86FrameLowering : public TargetFrameLowering {
const X86Subtarget &STI;
const X86InstrInfo &TII;
const X86RegisterInfo *TRI;
+ const X86ReturnProtectorLowering RPL;
++ bool SaveArgs;
++
unsigned SlotSize;
-@@ -67,6 +70,8 @@ class X86FrameLowering : public TargetFrameLowering {
+ /// Is64Bit implies that x86_64 instructions are available.
+@@ -67,6 +72,8 @@ class X86FrameLowering : public TargetFrameLowering {
/// the function.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const
override;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
override;
Index: patches/patch-lib_Target_X86_X86MachineFunctionInfo_h
===================================================================
RCS file: patches/patch-lib_Target_X86_X86MachineFunctionInfo_h
diff -N patches/patch-lib_Target_X86_X86MachineFunctionInfo_h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-lib_Target_X86_X86MachineFunctionInfo_h 5 Feb 2019
00:34:58 -0000
@@ -0,0 +1,27 @@
+$OpenBSD: patch-lib_Target_X86_X86MachineFunctionInfo_h,v 1.1 2019/01/31
13:40:22 jca Exp $
+
+implement -msave-args in clang/llvm, like the sun did for gcc
+
+Index: lib/Target/X86/X86MachineFunctionInfo.h
+--- lib/Target/X86/X86MachineFunctionInfo.h.orig
++++ lib/Target/X86/X86MachineFunctionInfo.h
+@@ -41,6 +41,9 @@ class X86MachineFunctionInfo : public MachineFunctionI
+ /// stack frame in bytes.
+ unsigned CalleeSavedFrameSize = 0;
+
++ // SaveArgSize - Number of register arguments saved on the stack
++ unsigned SaveArgSize = 0;
++
+ /// BytesToPopOnReturn - Number of bytes function pops on return (in
addition
+ /// to the space used by the return address).
+ /// Used on windows platform for stdcall & fastcall name decoration
+@@ -123,6 +126,9 @@ class X86MachineFunctionInfo : public MachineFunctionI
+
+ unsigned getCalleeSavedFrameSize() const { return CalleeSavedFrameSize; }
+ void setCalleeSavedFrameSize(unsigned bytes) { CalleeSavedFrameSize =
bytes; }
++
++ unsigned getSaveArgSize() const { return SaveArgSize; }
++ void setSaveArgSize(unsigned bytes) { SaveArgSize = bytes; }
+
+ unsigned getBytesToPopOnReturn() const { return BytesToPopOnReturn; }
+ void setBytesToPopOnReturn (unsigned bytes) { BytesToPopOnReturn = bytes;}
Index: patches/patch-lib_Target_X86_X86Subtarget_h
===================================================================
RCS file:
/home/cvs/ports/devel/llvm/patches/patch-lib_Target_X86_X86Subtarget_h,v
retrieving revision 1.4
diff -u -p -u -p -r1.4 patch-lib_Target_X86_X86Subtarget_h
--- patches/patch-lib_Target_X86_X86Subtarget_h 3 Feb 2019 18:29:48 -0000
1.4
+++ patches/patch-lib_Target_X86_X86Subtarget_h 5 Feb 2019 00:58:17 -0000
@@ -1,11 +1,31 @@
-$OpenBSD: patch-lib_Target_X86_X86Subtarget_h,v 1.4 2019/02/03 18:29:48 jca
Exp $
+$OpenBSD: patch-lib_Target_X86_X86Subtarget_h,v 1.3 2019/01/31 13:40:22 jca
Exp $
-Turn on -mretpoline by default in clang on amd64.
+- implement -msave-args in clang/llvm, like the sun did for gcc
+- Turn on -mretpoline by default in clang on amd64.
Index: lib/Target/X86/X86Subtarget.h
--- lib/Target/X86/X86Subtarget.h.orig
+++ lib/Target/X86/X86Subtarget.h
-@@ -699,6 +699,7 @@ class X86Subtarget final : public X86GenSubtargetInfo
+@@ -400,6 +400,9 @@ class X86Subtarget final : public X86GenSubtargetInfo
+ /// entry to the function and which must be maintained by every function.
+ unsigned stackAlignment = 4;
+
++ /// Whether function prologues should save register arguments on the stack.
++ bool SaveArgs = false;
++
+ /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
+ ///
+ // FIXME: this is a known good value for Yonah. How about others?
+@@ -478,6 +481,8 @@ class X86Subtarget final : public X86GenSubtargetInfo
+ return &getInstrInfo()->getRegisterInfo();
+ }
+
++ bool getSaveArgs() const { return SaveArgs; }
++
+ /// Returns the minimum alignment known to hold of the
+ /// stack frame on entry to the function and which must be maintained by
every
+ /// function for this subtarget.
+@@ -699,6 +704,7 @@ class X86Subtarget final : public X86GenSubtargetInfo
bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
bool isTargetFreeBSD() const { return TargetTriple.isOSFreeBSD(); }
Index: patches/patch-lib_Target_X86_X86_td
===================================================================
RCS file: patches/patch-lib_Target_X86_X86_td
diff -N patches/patch-lib_Target_X86_X86_td
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-lib_Target_X86_X86_td 5 Feb 2019 00:34:58 -0000
@@ -0,0 +1,17 @@
+$OpenBSD: patch-lib_Target_X86_X86_td,v 1.1 2019/01/31 13:40:22 jca Exp $
+
+implement -msave-args in clang/llvm, like the sun did for gcc
+
+Index: lib/Target/X86/X86.td
+--- lib/Target/X86/X86.td.orig
++++ lib/Target/X86/X86.td
+@@ -284,6 +284,9 @@ def FeatureLZCNTFalseDeps : SubtargetFeature<"false-de
+ "LZCNT/TZCNT have a false dependency on
dest register">;
+ def FeaturePCONFIG : SubtargetFeature<"pconfig", "HasPCONFIG", "true",
+ "platform configuration instruction">;
++def FeatureSaveArgs
++ : SubtargetFeature<"save-args", "SaveArgs", "true",
++ "Save register arguments on the stack.">;
+ // On recent X86 (port bound) processors, its preferable to combine to a
single shuffle
+ // using a variable mask over multiple fixed shuffles.
+ def FeatureFastVariableShuffle
Index: patches/patch-tools_clang_include_clang_Driver_Options_td
===================================================================
RCS file:
/home/cvs/ports/devel/llvm/patches/patch-tools_clang_include_clang_Driver_Options_td,v
retrieving revision 1.16
diff -u -p -u -p -r1.16 patch-tools_clang_include_clang_Driver_Options_td
--- patches/patch-tools_clang_include_clang_Driver_Options_td 3 Feb 2019
18:29:48 -0000 1.16
+++ patches/patch-tools_clang_include_clang_Driver_Options_td 5 Feb 2019
00:34:58 -0000
@@ -1,7 +1,8 @@
-$OpenBSD: patch-tools_clang_include_clang_Driver_Options_td,v 1.16 2019/02/03
18:29:48 jca Exp $
+$OpenBSD: patch-tools_clang_include_clang_Driver_Options_td,v 1.15 2019/01/31
13:40:22 jca Exp $
- Add ret protctor options as no-ops.
- Alias the command line parameter -p to -pg.
+- implement -msave-args in clang/llvm, like the sun did for gcc
Index: tools/clang/include/clang/Driver/Options.td
--- tools/clang/include/clang/Driver/Options.td.orig
@@ -26,3 +27,12 @@ Index: tools/clang/include/clang/Driver/
def pie : Flag<["-"], "pie">;
def read__only__relocs : Separate<["-"], "read_only_relocs">;
def remap : Flag<["-"], "remap">;
+@@ -2810,6 +2814,8 @@ def mretpoline : Flag<["-"], "mretpoline">, Group<m_x8
+ def mno_retpoline : Flag<["-"], "mno-retpoline">, Group<m_x86_Features_Group>;
+ def mretpoline_external_thunk : Flag<["-"], "mretpoline-external-thunk">,
Group<m_x86_Features_Group>;
+ def mno_retpoline_external_thunk : Flag<["-"],
"mno-retpoline-external-thunk">, Group<m_x86_Features_Group>;
++def msave_args : Flag<["-"], "msave-args">, Group<m_x86_Features_Group>;
++def mno_save_args : Flag<["-"], "mno-save-args">, Group<m_x86_Features_Group>;
+
+ // These are legacy user-facing driver-level option spellings. They are always
+ // aliases for options that are spelled using the more common Unix / GNU flag
Index: patches/patch-tools_clang_lib_Basic_Targets_X86_cpp
===================================================================
RCS file: patches/patch-tools_clang_lib_Basic_Targets_X86_cpp
diff -N patches/patch-tools_clang_lib_Basic_Targets_X86_cpp
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-tools_clang_lib_Basic_Targets_X86_cpp 5 Feb 2019 00:34:58
-0000
@@ -0,0 +1,24 @@
+$OpenBSD: patch-tools_clang_lib_Basic_Targets_X86_cpp,v 1.1 2019/01/31
13:40:22 jca Exp $
+
+implement -msave-args in clang/llvm, like the sun did for gcc
+
+Index: tools/clang/lib/Basic/Targets/X86.cpp
+--- tools/clang/lib/Basic/Targets/X86.cpp.orig
++++ tools/clang/lib/Basic/Targets/X86.cpp
+@@ -814,6 +814,8 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<s
+ HasPTWRITE = true;
+ } else if (Feature == "+invpcid") {
+ HasINVPCID = true;
++ } else if (Feature == "+save-args") {
++ HasSaveArgs = true;
+ }
+
+ X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
+@@ -1386,6 +1388,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) cons
+ .Case("movdiri", HasMOVDIRI)
+ .Case("movdir64b", HasMOVDIR64B)
+ .Case("mpx", HasMPX)
++ .Case("save-args", HasSaveArgs)
+ .Case("mwaitx", HasMWAITX)
+ .Case("pclmul", HasPCLMUL)
+ .Case("pconfig", HasPCONFIG)
Index: patches/patch-tools_clang_lib_Basic_Targets_X86_h
===================================================================
RCS file: patches/patch-tools_clang_lib_Basic_Targets_X86_h
diff -N patches/patch-tools_clang_lib_Basic_Targets_X86_h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-tools_clang_lib_Basic_Targets_X86_h 5 Feb 2019 00:34:58
-0000
@@ -0,0 +1,15 @@
+$OpenBSD: patch-tools_clang_lib_Basic_Targets_X86_h,v 1.1 2019/01/31 13:40:22
jca Exp $
+
+implement -msave-args in clang/llvm, like the sun did for gcc
+
+Index: tools/clang/lib/Basic/Targets/X86.h
+--- tools/clang/lib/Basic/Targets/X86.h.orig
++++ tools/clang/lib/Basic/Targets/X86.h
+@@ -107,6 +107,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public T
+ bool HasMOVDIR64B = false;
+ bool HasPTWRITE = false;
+ bool HasINVPCID = false;
++ bool HasSaveArgs = false;
+
+ protected:
+ /// Enumeration of all of the X86 CPUs supported by Clang.
