You don't really have to deal with the netlists anymore.
The only thing you name are busses : Data0..Data15, Clk, ... and
power nets GND, GND_ISO, +5V, +3.3V, -5.2V, ...
After annotating (tools,annotate), use update design(design, update pcb).
That's it.

My libraries do not differentiate between a 74LS74 and a 74LVC74, there is just
a DIP14 and an SO14 case to choose from.

Rene
-- 
Ing.Buero R.Tschaggelar - http://www.ibrtses.com

Forum Administrator wrote:
> 
> Subject: Net Name Conventions
> Date: Fri, 16 Feb 2001 22:05:38 -0500
> 
> I am currently running the 99SE-Trial Package will I wait for the refund
> from a certain unsatisfactory/unnamed EDA competitor that will allow me to
> purchase the full 99SE package. While running the trial package, I have
> come across no mention of net-naming character restrictions in any of the
> Protel manuals/docs or help files. From my playing around with the
> packages, I suspect that it would be a very good idea to establish some
> net-naming conventions before I start any major design entries. I am
> thinking about naming conventions such as prefix/suffix to indicate
> active-high, active-low, active-edge, and/or logic level (TTL, LV, or
> LVDS) I have used other EDA packages where the wrong choice of naming
> conventions could make it really difficult to deal with the
> netlist. However, I don't yet have enough experience with 99SE to trust my
> own judgement on this topic.

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