Greetings all,

    I am contemplating adding a stitched perimeter of grounded
vias on my board outline to reduce generating noise and EMI.
My board is an embedded microcontroller application
that runs at 33 MHz .

-Is this technique effective in reducing generated noise?

-Is there an easy way to generate the about 1 mm distanced vias
on a grounded fill or  polygon?

-Do I use a fill or a polygon for this?

-My design is 6 layers, does it need to be around each  signal layer?


Thanks

Mamdouh Wahab

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