Jeff Adolphs wrote:
> Hello,
>
> How many of you out there talk with the PCB manufacturers Process Engineer
> to see how they will do the PCB Layer Stackup?
>
> A IPC lecturer recomends I always talk to the Process Engineer and should be
> doing extensive documentation on my PCB
> Fab Drawing.
It depends totally on what you are doing. If you are doing 5 MHz
microcontrollers
on double-sided boards, it is unlikely that the construction of the board is
going
to change charateristics much. If you are doing 8+ layer boards with buried
striplines carrying 500+ MHz digital communications signals, or clocking
multiple chips that have tight timing constraints at 500+ MHz, then even tiny
process variations could affect a design enough that the timing needs to be
adjusted.
There are clocking system chips that measure the relative timings at various
nodes on the board and try to continuously, automatically keep them in sync.
I suspect PC board variations are one of the reasons such chips exist.
Jon
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