I'm sure you'll get a lot of responses to this one. The general consensus is
that a solution proposed by Abd ul-Rahman Lomax is the best option. I'll
repeat here (without permission!) the text from his post of 27th June 2001
(once again, I take no credit for this, but as no answers have arrived to
your question I thought that this could help you out. I think America is
quiet for Thanksgiving).


>I have a requirement for a link option that is a 'break-to-open' type link.
>I have two pads and a shorting track between them. One pad is connected to
>ground, the other pad is an address line with a pull up resistor to Vcc.
>The problem is I get DRC violations for the the pad/track clearence and I
>want to know how I can modify the DRs to prevent the violations. I'm not
>particularly familiar with Protel's pcb design tool so any help would be
>great. Any ideas folks?

[The answer below should be credited to Abd ul-Rahman Lomax, not me! -

Regular readers will anticipate my answer.... this is a job for Virtual
Short! [music swells as the superhero with a big VS on his T-shirt comes

A Virtual Short (which might just as well be named a Virtual Open) is a
two-pin component which has primitives separated by a truly miniscule gap.
Because the DRC calculations get a little flaky at the microinch level, I
don't remember exactly what parameters work, so it might take a little

What one does is to create a gap of a few microinches. Not only is this not
possible to fabricate, it is also not possible to keep a gap that small on
the film, unless you are making ICs and paying very big bucks for film or
glass plates or whatever might work at that level and photoplotters that
they charge you $100 just to peek in the door, forget actually having a
plot made. In addition, by leaving the photoplot match level at 0.005 mil,
Protel's default, even the gerbers will have no gap.

But to DRC, this is not a short.

As an example of how one might create a footprint which would do the
requested job and which would be easy to cut, use two square pads, and then
place between them a smaller pad that almost contacts the other pads.
Perhaps the two square pads are 70 mil pads with 40 mil holes, with 30 mils
gap, which would allow Berg pins to be inserted if it was desired to later
make this a jumper option. Then a surface pad is placed in the center,
perhaps on the solder side, which would be 30 mils square. This will short
the outer pads. Now the central pad is reduced in size to 29.996 mils. This
will leave a 2 microinch gap on both sides. Then a design rule is created
with footprint scope that allows a .001 mil gap for that footprint. Done.

This part will short two nets without creating a DRC error. It is
schematic-driven and requires no special attention once it has been
created. If you forget to create the DRC rule covering it, DRC will remind

Abdulrahman Lomax

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