Hi, Mike-

UL will be happy with spacings that will lead to disaster in
practical application. Use at least the VDE spacing of 8mm
edge to edge. In fact, though, even this is marginal for 1KV;
eventual contamination will cause tracking across the PCB surface.
Motorola had a good Apps Note on applying Opto-Isolators which 
gives some useful tips. They are supposed to stand off 2.5KV.

Best is to add 125mil wide non-plated slots between 1KV and all other 
conductors, or allow a half inch or more across bare FR4. Spray-on 
conformal coating can be added if low leakage is a must, possibly the 
case if you're only generating 1mA. And don't let the proto fall in your
lap during testing....

Brian

At 01:31 PM 10/8/02 -0700, you wrote:
>I have a quick turn pcb with < 1000V @ app 1ma max.
>
>What trace/plane separation is required for UL/CE?
>
>Mike
> 

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