It is instructive to note that in your post, you took the time to
actually answer Dr Roberts question, very fully. Mr Jenkins replied only
to be offensive by inferring that you were " ignornat " (sic), and he
did not contribute anything to the original question.....

Peter Moreton 

-----Original Message-----
From: Jason Morgan [mailto:[EMAIL PROTECTED] 
Sent: 09 July 2003 16:15
Subject: Re: [PEDA] Protel EDA Forum... was adjacent component placeme
nt D XP


Seems somebody got out of the wrong side of the bed this morning....

After reading my post again, in-case I did make a mistake (it has been
on several occasions)
I stand by my response, it was correct in every way and written by an
user long term member of both lists.

I was in no way rude or abusive to the original author, nor did I cast
on the validity of PEDA, indeed, they are providing better support for
Protel 99se and below
in a way Protel, pre-Altium never managed (my experience in the UK

I just pointed out you may get a response from people who know more
DXP on a
list maintained for DXP users.  Posting on the official DXP list will
draw potential
problems to the attention of Altium's engineers who own and monitor the

We all know that DXP is (on the surface at least) very different to
and these questions
on "how do I....." come up all the time.  It is very important that
are aware of
such discussions so that they can put effort into improving the

I think other, (less aggressive) long term users of both lists will


-----Original Message-----
Sent: 09 July 2003 13:57
Subject: Protel EDA Forum... was RE: [PEDA] adjacent component placement

Mr Morgan,

Since when is this the "Protel 99SE" list?

For your future information, this is the Protel EDA Forum, as clearly
explicity stated in the footer appended to each and every list message,
kindly maintained by Techserv, Inc for the quasi-public dissemination of
issues related to any and all versions of Protel EDA software,
but not limited to P99SE...AND DXP.

I think I speak for a portion of this list (though clearly not all) when
say that I would appreciate it if you would attempt to remember this
spouting off erroneous garbage like the bull sheisa you post below. In
case, I speak for myself.

Finally, I want to be clear to Dr Roberts that this is not the exclusive
territory of P99SE users, and Dr Roberts is welcome to post queries or
otherwise participate in this forum as she likes.

As Jason indicated, there is another forum, sponsored by Altium, which
dedicated to DXP, but I feel the need to attempt to un-obfuscate the
distinction between these forums. Altium's is one which is a
corporate sponsored list, with all of the implications that go with that
status. Techserv's is an open user's forum for ANY and ALL Protel EDA
products, regardless of any ignornat comments made by it's novice or

thank you,

Andrew Jenkins

> -----Original Message-----
> From: Jason Morgan [mailto:[EMAIL PROTECTED]
> Sent: Wednesday, July 09, 2003 4:46 AM
> To: 'Protel EDA Forum'
> Firstly you posted to the wrong list, this list is for Protel 
> 99se, and not
> DXP,
> there is a separate list for DXP issues, see
> http://forums.altium.com/cgi-bin/msgbylist.asp?list=dxp
> To answer your question, its the same as in 99se, you create a
> component-component clearance rule
> that uses the same component type for each side of the rule.
> I use this exact method for a mechanical part that sits over 
> some LEDs.
> e.g.
> Create a rule in Placement: Component Clearance: New Rule
> HasFootprint('FOOTPRINT_1') vs HasFootprint('FOOTPRINT_1') you need to
> specify "Full Check"
> and a large negative clearance, e.g. -999mm
> Make sure that the rule priority puts this rule above the 
> global clearance
> rule, Press the Priorities
> button to check.
> Also, make sure that one of the electrical clearance rules 
> does not also
> fail, though you should be
> able to tell the difference of a component clearance fail and 
> a net fail by
> the colours on the screen.
> Jason.
> -----Original Message-----
> From: Dr Gwyn Roberts [mailto:[EMAIL PROTECTED]
> Sent: 09 July 2003 09:21
> Cc: Aled Williams
> Subject: [PEDA] adjacent component placement DXP
> Hi all,
> Need to place a number of terminal blocks in a row, with the body of 
> each touching that of its neighbour, on a PCB being laid out 
> in Protel DXP.
> Despite setting the electrical placement and component clearance DRCs 
> for these particular components to 0mm, Protel still flags this a 
> violation when they are placed next to each other.  .  
> Anyone come across this problem/know of a workaround?
> Many thanks
> Gwyn Roberts
> Univ of Wales, Bangor

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