Pete, I've had similar things happen when the Clearance Rule has been changed from "Different Nets Only" to "Any Net." I know that you said you hadn't changed any of the default rules but it's a quick and easy check.
Hope this helps. brian -----Original Message----- From: Peter Moreton [mailto:[EMAIL PROTECTED] Sent: Thursday, July 17, 2003 11:21 AM To: 'Protel EDA Forum' Subject: [PEDA] DRC errors I'm updating a PCB after making some schematic changes, and the PCB DRC checker is giving lots of violations of 'clearance constraints' and 'short circuit constraints' - I haven't changed any of the default protel design rules, and no matter how much I space out the parts, I'm still getting these errors. Could someone give me a pointer as to where to start looking? (I'm using Protel 99SE SP6. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
