Re: [PATCH v2 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b

[LIU Zhiwei]

On 2024/8/2 14:45, Richard Henderson wrote:
On 8/2/24 16:21, LIU Zhiwei wrote:
By the way, the MXL is const now in recently updated RISC-V 
specification.

Oh yes? 
Yes.  In 1.13 privileged specification about MISA CSR:

"The MXL field is read-only. If misa is nonzero, the MXL field indicates 
the effective XLEN in M-mode, a
constant termed MXLEN."

Then perhaps we should rename misa_mxl_max to misa_mxl.

I will mark this on my todo list.

Thanks,
Zhiwei



r~