On Thu, 5 Jun 2025 at 03:26, <taotang2...@gmail.com> wrote: > > From: Tao Tang <taotang2...@gmail.com> > > The current definition of the SMMU_CR0_RESERVED mask is incorrect. > It mistakenly treats bit 10 (DPT_WALK_EN) as a reserved bit
This is because our implementation pre-dates the revision of the SMMUv3 spec which adds the DPT and this DPT_WALK_EN bit. So for us it is/was legitimately reserved. We use this constant value to update SMMU_CR0ACK when the guest writes to SMMU_CR0, so ideally we shouldn't mark bits as non-reserved unless we actually implement the feature that they correspond to. We don't get this right for VMW and ATSCHK, which are both "RES0 unless the ID register indicates presence of some feature" fields, but which we allow the guest to write to (and cause updates to CR0ACK) anyway. > while > treating bit 9 (RES0) as an implemented bit. This part is a bug; nice catch. thanks -- PMM
