On Sun, 22 Jun 2025 at 00:55, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Indicate whether to use FPST_FPCR or FPST_ZA via bit 2 of
> simd_data(desc). For SVE, this bit remains zero.
> For do_FMLAL_zzzw, this requires no change.
> For do_FMLAL_zzxw, move the index up one bit.
>
> Read fz16 directly from env->fpcr.
This line of the commit message doesn't seem related to the change?
We were already reading fz16 from env->fpcr.
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/arm/tcg/translate-sve.c | 2 +-
> target/arm/tcg/vec_helper.c | 8 +++++---
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
> index 87b6e4a88e..7f8ca78a91 100644
> --- a/target/arm/tcg/translate-sve.c
> +++ b/target/arm/tcg/translate-sve.c
> @@ -7168,7 +7168,7 @@ static bool do_FMLAL_zzxw(DisasContext *s, arg_rrxr_esz
> *a, bool sub, bool sel)
> {
> return gen_gvec_ptr_zzzz(s, gen_helper_sve2_fmlal_zzxw_s,
> a->rd, a->rn, a->rm, a->ra,
> - (a->index << 2) | (sel << 1) | sub, tcg_env);
> + (a->index << 3) | (sel << 1) | sub, tcg_env);
> }
>
> TRANS_FEAT(FMLALB_zzxw, aa64_sve2, do_FMLAL_zzxw, a, false, false)
> diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
> index 671777ce52..16ddd35239 100644
> --- a/target/arm/tcg/vec_helper.c
> +++ b/target/arm/tcg/vec_helper.c
> @@ -2191,7 +2191,8 @@ void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void
> *vm, void *va,
> intptr_t i, oprsz = simd_oprsz(desc);
> bool is_s = extract32(desc, SIMD_DATA_SHIFT, 1);
> intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16);
> - float_status *status = &env->vfp.fp_status[FPST_A64];
> + bool za = extract32(desc, SIMD_DATA_SHIFT + 2, 1);
> + float_status *status = &env->vfp.fp_status[za ? FPST_ZA : FPST_A64];
> bool fz16 = env->vfp.fpcr & FPCR_FZ16;
> int negx = 0, negf = 0;
>
> @@ -2274,8 +2275,9 @@ void HELPER(sve2_fmlal_zzxw_s)(void *vd, void *vn, void
> *vm, void *va,
> intptr_t i, j, oprsz = simd_oprsz(desc);
> bool is_s = extract32(desc, SIMD_DATA_SHIFT, 1);
> intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16);
> - intptr_t idx = extract32(desc, SIMD_DATA_SHIFT + 2, 3) * sizeof(float16);
> - float_status *status = &env->vfp.fp_status[FPST_A64];
> + bool za = extract32(desc, SIMD_DATA_SHIFT + 2, 1);
> + intptr_t idx = extract32(desc, SIMD_DATA_SHIFT + 3, 3) * sizeof(float16);
> + float_status *status = &env->vfp.fp_status[za ? FPST_ZA : FPST_A64];
> bool fz16 = env->vfp.fpcr & FPCR_FZ16;
> int negx = 0, negf = 0;
>
Otherwise
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
