mcontext is at most 14 bits in size with the H extension, fix to 16 bits. trigger_cur indexes into tdata*[RV_MAX_TRIGGERS] which holds 2 elements, fix to 8 bits.
This patch also adds a migration entry for mcontext which is used in tandem with other debug data that is already migrated. Note, the cpu/debug VMSTATE version is bumped, breaking migration from older versions. Signed-off-by: Anton Johansson <[email protected]> Reviewed-by: Pierrick Bouvier <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Acked-by: Alistair Francis <[email protected]> --- target/riscv/cpu.h | 10 +++++----- target/riscv/machine.c | 13 +++++++------ 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index ee4444f22d..153480846a 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -467,11 +467,11 @@ struct CPUArchState { target_ulong mseccfg; /* trigger module */ - target_ulong trigger_cur; - target_ulong tdata1[RV_MAX_TRIGGERS]; - target_ulong tdata2[RV_MAX_TRIGGERS]; - target_ulong tdata3[RV_MAX_TRIGGERS]; - target_ulong mcontext; + uint16_t mcontext; + uint8_t trigger_cur; + uint64_t tdata1[RV_MAX_TRIGGERS]; + uint64_t tdata2[RV_MAX_TRIGGERS]; + uint64_t tdata3[RV_MAX_TRIGGERS]; struct CPUBreakpoint *cpu_breakpoint[RV_MAX_TRIGGERS]; struct CPUWatchpoint *cpu_watchpoint[RV_MAX_TRIGGERS]; QEMUTimer *itrigger_timer[RV_MAX_TRIGGERS]; diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 376075b2bd..c6ebb58882 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -239,15 +239,16 @@ static int debug_post_load(void *opaque, int version_id) static const VMStateDescription vmstate_debug = { .name = "cpu/debug", - .version_id = 2, - .minimum_version_id = 2, + .version_id = 3, + .minimum_version_id = 3, .needed = debug_needed, .post_load = debug_post_load, .fields = (const VMStateField[]) { - VMSTATE_UINTTL(env.trigger_cur, RISCVCPU), - VMSTATE_UINTTL_ARRAY(env.tdata1, RISCVCPU, RV_MAX_TRIGGERS), - VMSTATE_UINTTL_ARRAY(env.tdata2, RISCVCPU, RV_MAX_TRIGGERS), - VMSTATE_UINTTL_ARRAY(env.tdata3, RISCVCPU, RV_MAX_TRIGGERS), + VMSTATE_UINT16(env.mcontext, RISCVCPU), + VMSTATE_UINT8(env.trigger_cur, RISCVCPU), + VMSTATE_UINT64_ARRAY(env.tdata1, RISCVCPU, RV_MAX_TRIGGERS), + VMSTATE_UINT64_ARRAY(env.tdata2, RISCVCPU, RV_MAX_TRIGGERS), + VMSTATE_UINT64_ARRAY(env.tdata3, RISCVCPU, RV_MAX_TRIGGERS), VMSTATE_END_OF_LIST() } }; -- 2.51.0
