On 11/12/25 10:17, Jim MacArthur wrote:
@@ -6102,6 +6102,9 @@ static void tcr2_el1_write(CPUARMState *env, const 
ARMCPRegInfo *ri,
      if (cpu_isar_feature(aa64_aie, cpu)) {
          valid_mask |= TCR2_AIE;
      }
+    if (cpu_isar_feature(aa64_asid2, cpu)) {
+        valid_mask |= TCR2_FNG1 | TCR2_FNG0 | TCR2_A2;
+    }
      value &= valid_mask;
      raw_write(env, ri, value);
  }

These same bits also need to be enabled in tcr2_el2_write.

Otherwise,
Reviewed-by: Richard Henderson <[email protected]>


r~

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