Jim MacArthur <[email protected]> writes: > This just allows read/write of three feature bits. ASID is still > ignored. Any writes to TTBR0_EL0 and TTBR1_EL0, including changing > the ASID, will still cause a complete flush of the TLB. > > Signed-off-by: Jim MacArthur <[email protected]>
I will defer to Peter on this but I'd potentially split the adding of the feature from the enabling it automatically in -cpu max. But its a minor thing given the size of the patch. Could you also update docs/system/arm/emulation.rst with the feature. Otherwise: Reviewed-by: Alex Bennée <[email protected]> -- Alex Bennée Virtualisation Tech Lead @ Linaro
