On 08/02/2017 09:43 AM, Peter Maydell wrote: > We currently store the M profile CPU register state PRIMASK and > FAULTMASK in the daif field of the CPU state in its I and F > bits. This is a legacy from the original implementation, which > tried to share the cpu_exec_interrupt code between A profile > and M profile. We've since separated out the two cases because > they are significantly different, so now there is no common > code between M and A profile which looks at env->daif: all the > uses are either in A-only or M-only code paths. Sharing the state > fields now is just confusing, and will make things awkward > when we implement v8M, where the PRIMASK and FAULTMASK > registers are banked between security states. > > Switch M profile over to using v7m.faultmask and v7m.primask > fields for these registers. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > hw/intc/armv7m_nvic.c | 4 ++-- > target/arm/cpu.c | 5 ----- > target/arm/cpu.h | 4 +++- > target/arm/helper.c | 18 +++++------------- > target/arm/machine.c | 33 +++++++++++++++++++++++++++++++++ > 5 files changed, 43 insertions(+), 21 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
