Dear Daniel, We've had this discussion on a recent pull request where some code was going to be copied directly from hw/arm/virt.c to hw/riscv/virt.c and we have subsequently relicensed the recipient file as GPLv2+. This code has not yet been incorporated into the port. Besides naming conventions and use of some common APIs, however the logic in hw/riscv/virt.c is original work. Try diffing them. I wrote the device tree code from scratch and we have a unique memory map, and the other functions are dervied from other RISC-V machines which are MIT licensed.
- https://github.com/riscv/riscv-qemu/pull/109 In any case, SiFive are happy to license their contributions as GPLv2+. We'll need to get the main contributors to agree to re-license to GPLv2+ or fall back to having GPLv2+ prefix the MIT license, as MIT is compatible with GPLv2+. Stefan O'Rear has commented that he is happy for his code to be GPLv2+ and so is SiFive, but we'll need to get confirmation from Sagar, one of the main port contributors, and potentially the whole list of contributors to do complete due diligence on re-licensing. i.e. if we want to eradicate MIT license from the code-base. SiFive have made substantial changes to all of the non-GPLv2+ files in the port, and SiFive can license their contributions as GPLv2+ which would allow us to prefix all files in hw/riscv with GPLv2+. The only issue is that we must get approval from contributors to completely remove the MIT license, as the original contributors licensed their code under that license, as is the case for all of Fabrice's original code and many other parts of the code base e.g. GPEX hw/pci-host/gpex.c. SiFive have made substantial changes to all files in the RISC-V port, so we would be empowered to at least prefix the MIT license with GPLv2+. Is that acceptable? the MIT terms are compatible with GPLv2+ as MIT is a "permissive-license". 'cc Sagar, Bastian, as they have been main contributors to the port in the past... Regards, Michael. On Fri, Feb 23, 2018 at 11:10 PM, Daniel P. Berrangé <berra...@redhat.com> wrote: > On Fri, Feb 23, 2018 at 01:11:46PM +1300, Michael Clark wrote: > > QEMU RISC-V Emulation Support (RV64GC, RV32GC) > > > > This is hopefully the "fix remaining issues in-tree" release. > > This code seems to be a mixture of LGPLv2+ and MIT licensed code. The > preferred license for QEMU contributions is GPLv2+. Is there a reason > you need to diverge from this or can it be changed to be all GPLv2+ ? > > Regards, > Daniel > -- > |: https://berrange.com -o- https://www.flickr.com/photos/ > dberrange :| > |: https://libvirt.org -o- > https://fstop138.berrange.com :| > |: https://entangle-photo.org -o- https://www.instagram.com/ > dberrange :| >
