Re: [PATCH v5 17/60] target/riscv: vector single-width integer multiply instructions

[Richard Henderson]

On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +static int64_t do_mulhsu_d(int64_t s2, uint64_t s1)
> +{
> +    uint64_t hi_64, lo_64, abs_s2 = s2;
> +
> +    if (s2 < 0) {
> +        abs_s2 = -s2;
> +    }
> +    mulu64(&lo_64, &hi_64, abs_s2, s1);
> +    if ((int64_t)(s2 ^ s1) < 0) {

Why would the sign of s1 be relevant?
It's always unsigned.

We have code for this in e.g. tcg_gen_mulsu2_i64

    mulu4(&lo, &hi, s1, s2);
    if ((int64_t)s2 < 0) {
        hi -= s2;
    }


r~