On Mon, Feb 01, 2021 at 04:53:03PM +0000, Peter Maydell wrote: > On Mon, 1 Feb 2021 at 15:39, Daniel P. Berrangé <berra...@redhat.com> wrote: > > > > It is useful to know which CPUs satisfy each x86-64 ABI > > compatibility level, when dealing with guest OS that require > > something newer than the baseline ABI. > > > > These ABI levels are defined in: > > > > https://gitlab.com/x86-psABIs/x86-64-ABI/ > > > > and supported by GCC, CLang, GLibC and more. > > > > Signed-off-by: Daniel P. Berrangé <berra...@redhat.com> > > +ABI compatibility levels for CPU models > > +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > > + > > +The x86_64 architecture has a number of `ABI compatibility levels`_ > > +defined. Traditionally most operating systems and toolchains would > > +only target the original baseline ABI. It is expected that in > > +future OS and toolchains are likely to target newer ABIs. The > > +following table illustrates which ABI compatibility levels can be > > +satisfied by the QEMU CPU models > > + > > +.. _ABI compatibility levels: https://gitlab.com/x86-psABIs/x86-64-ABI/ > > + > > +.. csv-table:: x86-64 ABI compatibility levels > > + :file: cpu-models-x86-abi.csv > > + :widths: 40,15,15,15,15 > > + :header-rows: 1 > > Apart from the QEMU/KVM specific CPU models, why is this something > we should be documenting rather than, say, the people specifying > what the ABI compatiblity levels are ?
QEMU's named CPU models are not a perfect match for features in the real world silicon. So even if someone has a Skylake Server CPU with feature X, this doesn't mean QEMU's definition of the Skylake-Server CPU model is guaranteed to have feature X. So we want to document the compatibility of the exact CPU models that QEMU has defined. Regards, Daniel -- |: https://berrange.com -o- https://www.flickr.com/photos/dberrange :| |: https://libvirt.org -o- https://fstop138.berrange.com :| |: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
