Plastic wrote, on 16/Feb/11 14:09 | Feb16:
On Wed, Feb 16, 2011 at 6:30 AM, David Tubbs<[email protected]> wrote:
<snip>
The address decoder now knows that 1. "This address is for you" and two, it
has three pins which it can now pas through a 3 to 8 line decoder:
input output on 8 pins
000 = 00000001
001 = 00000010
010 = 00000100
011 = 00001000
100 = 00010000
101 = 00100000
110 = 01000000
111 = 10000000
So now the lines A8 through A10 work through the address decoder, permitted
by the logic from A11+, to select which memory chip is being addressed.
Obviously, this is a gross simplification of memory addressing, and the QL
does it in two banks, and uses 4-bit chips so 2 chips need selecting to make
the 8 bit wide data bus... But in principle, this is how it works, and this
decision tree happens for every single memory access.
Fun, huh? :)
It was particularly good fun with sH using similar decoding chips.
Firstly we *knew* we could use three pins only to output the 8 bit keyrow.
However Laurence then realised that the *same* three select lines could
be used to read 8 separate input lines. This saved us ten Pic pins!
It actually was the reason for many extra functions (spare RS232, DCD,
Turbo and keylock). We simply wanted to fill all eight input lines!
Tony
--
QBBS (QL fido BBS 2:257/67) +44(0)1442-828255
[email protected] http://firshman.co.uk
Voice: +44(0)1442-828254 Fax: +44(0)1442-828255 Skype: tonyfirshman
TF Services, 29 Longfield Road, TRING, Herts, HP23 4DG
_______________________________________________
QL-Users Mailing List
http://www.q-v-d.demon.co.uk/smsqe.htm
