On 15 Sep 2013 at 17:29, Mark Martin wrote: > Having a full fledge ethernet interface without the socket limitations of > the WIZnet type of chips is an intriguing notion. I wonder if it will have > any impact on the amount of work the get a working uIP type stack -- uIP > doing things like packet reassembly/fragmentation/etc vs. acting more like > a pass-through. In either case, I don't think Posix sockets interface are a > requirement so uIP is just as good an API as anything else. Regardless of > whether it's communicating with a CP2200 or a WIZnet (or similar). > > It looks like I need to look into card edge connectors for native QL and a > breadboard.
How to get connected to the CPU bus is always the biggest problem with the original QL, as using extension bus makes things big and ugly. Using ROM slot takes away write access. And simulating writes with address lines is not something one would want while debugging an ethernet device. Maybe the best approach is to make something "big and ugly" first, get things working, and then go for the more difficult ROM slot approach, if there is still time and interest left. Should you (or anyone else) decide to actually use the CP2200, I could contribute a little PCB design with the complete ethernet circuitry und RJ45 connector, bringing address and data bus lines to an easy to solder connector. I have designed that already for the Q68, it would take only a few hours, as long as I don't have to buy anything or give explanations. (Warning: The CP2200 comes in a TQFP package with 0.5 mm pitch. Not impossible to solder, but not easy.) > I don't have a GC or SGC, but I do have a QXL I could use for > compilation and I'll look into putting together a build/test station. For compilation you could also use Jonathan Hudson's XTC68 cross compiler for the PC. Peter _______________________________________________ QL-Users Mailing List http://www.q-v-d.demon.co.uk/smsqe.htm
