On Mon, Sep 16, 2013 at 4:01 AM, Peter <[email protected]> wrote:

>
> How to get connected to the CPU bus is always the biggest problem with the
> original QL, as using extension bus makes things big and ugly.
>
> Using ROM slot takes away write access. And simulating writes with address
> lines is not something one would want while debugging an ethernet device.
>
>
I gathered something was wonky with that ROM slot after following Adrian's
progress. Now I know, thanks.

Is a socketed approach possible? I'm thinking the AdIDE and AdSpeed stuff
so common for Amigas and Atari ST back in the day. I honestly don't know
off the top of my head whether the CPU was always socketed so pardon me if
it usually isn't.


> Maybe the best approach is to make something "big and ugly" first, get
> things working, and then go for the more difficult ROM slot approach, if
> there is still time and interest left.
>


Especially if "big and ugly" means less complicated for someone with my
meager hardware skills.


>
> Should you (or anyone else) decide to actually use the CP2200, I could
> contribute a little PCB design with the complete ethernet circuitry und
> RJ45 connector, bringing address and data bus lines to an easy to solder
> connector.
>
> I have designed that already for the Q68, it would take only a few hours,
> as long as I don't have to buy anything or give explanations. (Warning:
> The CP2200 comes in a TQFP package with 0.5 mm pitch. Not impossible to
> solder, but not easy.)
>

If you could share that that would be great and probably save me 10x the
time since I can *maybe* solve the logic and bus issues but not the
physical and line quality issues (e.g. filtering and the discretes).


>
> > I don't have a GC or SGC, but I do have a QXL I could use for
> > compilation and I'll look into putting together a build/test station.
>
> For compilation you could also use Jonathan Hudson's XTC68 cross compiler
> for the PC.
>

Looking into that now, thanks.
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