Daniele Terdina wrote: > Marcel, do you know if any free VHDL simulation/analysis tools > exist that may be close to a code debugger (breakpoints etc., if that makes > sense)?
No idea, I've last worked with FPGAs 10 years ago and that was with actual hardware, some Altera evaluation board running a Nios soft core. After grading an IT paper that concerned itself with chip design for a College in Stuttgart last fall I read up on it again, but soon realized that I just don't have enough time to follow through... one day perhaps. But if the the core already sort-of-works I guess it might even be easier to check with actual hardware than in usually much slower simulation. Cheers, Marcel _______________________________________________ QL-Users Mailing List http://www.q-v-d.demon.co.uk/smsqe.htm
