I've my setup working too. I made a silly mistake whereby the rbf is
corrupted when I transfer it to my board.

Referring to your overlay,

       fpga-bridges = <&fpga_bridge0>, <&fpga_bridge1>,
<&fpga_bridge2>;
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0x0 0xc0000000 0x20000000>,
<1 0x0 0xff200000 0x00200000>;

Why there are 3 bridges but there are only 2 ranges?

Also, the sopc2dts 16.0 is still not able to generate a dts that is usable
on kernel 4.1?

On Fri, Jul 1, 2016 at 11:08 PM, Dalon Westergreen <dwest...@gmail.com>
wrote:

> This definitely is working for me, i just tested with the 4.1.22 LTSI
> kernel on the DE0 Nano / Atlas board.
>
> Attached are my device trees, and below you can the output from adding the
> dtbo
>
> # ls /lib/firmware/
> soc_system.rbf
> socfpga_cyclone5_socwks_fpga_overlay.dtb
> # mkdir config/device-tree/overlays/socwks/
> # echo socfpga_cyclone5_socwks_fpga_overlay.dtb >
> /config/device-tree/overlays/s
> ocwks/
> dtbo    path    status
> # echo socfpga_cyclone5_socwks_fpga_overlay.dtb >
> /config/device-tree/overlays/s
> ocwks/path
> [  256.010219] fpga_manager fpga0: writing soc_system.rbf to Altera
> SOCFPGA FPGA Manager
> #
>
> If you have one of the atlas boards i can share the build with you.
>
> --dalon
>
> On Thu, Jun 30, 2016 at 8:18 AM, Dalon Westergreen <dwest...@gmail.com>
> wrote:
>
>> ill give this a go...
>>
>> On Wed, Jun 29, 2016 at 10:16 PM, Teoh Choon Zone <
>> choon-zone.t...@vie.com.my> wrote:
>>
>>> Hi Phil,
>>>
>>> I didn't do anything to the 50-firmware.rules. My rules content is
>>> exactly same as yours. Maybe Dalon can provide us more guidance?
>>>
>>> On Thu, Jun 30, 2016 at 12:05 PM, Phil Reid <pr...@electromag.com.au>
>>> wrote:
>>>
>>>> G'day Teoh,
>>>>
>>>> On 30/06/2016 11:47, Teoh Choon Zone wrote:
>>>>
>>>>> I rechecked and found out that I didn't use fpga_bridge3. I disabled
>>>>> and regenerate the DTB but the error still happened. The error looks like
>>>>> the fpga_manager
>>>>> cannot find my rbf, no? Am I putting it at the correct place, which is
>>>>> "/lib/firmware"?
>>>>>
>>>> I'm interested in how this works as well.
>>>> Did you have to do anything with udev rules?
>>>>
>>>> Mine contains:
>>>> cat /lib/udev/rules.d/50-firmware.rules
>>>> # do not edit this file, it will be overwritten on update
>>>>
>>>> SUBSYSTEM=="firmware", ACTION=="add", RUN{builtin}="firmware"
>>>>
>>>>
>>>>
>>>>> Another question, do I configure the DTS correctly, especially the reg
>>>>> and ranges. I attached along my working DTS which I used in kernel 3.10.
>>>>>
>>>>> On Wed, Jun 29, 2016 at 9:38 PM, Dalon Westergreen <dwest...@gmail.com
>>>>> <mailto:dwest...@gmail.com>> wrote:
>>>>>
>>>>>     Are you really using all of the FPGA bridges?
>>>>>
>>>>>     fpga-bridges = <&fpga_bridge0>, <&fpga_bridge1>,
>>>>>     <&fpga_bridge2>, <&fpga_bridge3>;
>>>>>
>>>>>     ??
>>>>>
>>>>>     On Wed, Jun 29, 2016 at 2:11 AM, Teoh Choon Zone <
>>>>> choon-zone.t...@vie.com.my <mailto:choon-zone.t...@vie.com.my>> wrote:
>>>>>
>>>>>         I'm testing the new framework to program FPGA through DTB
>>>>> overlay. But after I execute "echo socfpga_gen3cam_fpga.dtbo >
>>>>>         /config/device-tree/overlays/socwks/path", I get error
>>>>> "fpga_manager fpga0: Error requesting firmware cyclonev_bw.rbf". FYI, I
>>>>> have put cyclonev_bw.rbf
>>>>>         in /ib/firmware. Any idea guys? I attached along my DTS.
>>>>>
>>>>
>>>>
>>>> --
>>>> Regards
>>>> Phil Reid
>>>>
>>>>
>>>
>>
>
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