On 07.07.2016 06:53, Chen-Yu Tsai wrote: > On Thu, Jul 7, 2016 at 12:50 PM, Stephan Roslen <[email protected]> wrote: >> I agree. Checking the diagram in subsection 1.5.2 of the A20 manual it >> seems, that LOSC can be a source for clocks like CPU and some SoC busses. So >> my patch could indeed mess with the whole clock tree. > > (Please wrap your email)
Sorry. > > Within the current sunxi clk structure, the LOSC is registered as a fixed > 32.768 KHz clk. So this patch actually makes things right. In this case it should still be addressed somewhere in drivers/clk/sunxi, not in drivers/rtc, I guess? Would you prefer setting the external 32.768 KHz crystal as hard coded default instead of providing the muxer? It could be considered okay, for the data sheet seems to demand presence of the external oscillator and there is absolutely no use in a 32KHz +- 20% oscillator, if a 32.768KHz crystal is available. Stephan -- You received this message because you are subscribed to "rtc-linux". Membership options at http://groups.google.com/group/rtc-linux . Please read http://groups.google.com/group/rtc-linux/web/checklist before submitting a driver. --- You received this message because you are subscribed to the Google Groups "rtc-linux" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
