On 2014-02-18 14:49, Daniel Hellstrom wrote:
Is this needed for CPU0 also?
I don't know. In which state are the caches after a power-on-reset?
Otherwise I think it would be enough to invalidate the caches when the other cache parameters to save one instruction, they are modified in leon3_secondary_cpu_initialize(): - sparc_leon3_set_cctrl( 0x80000F ); + sparc_leon3_set_cctrl( 0xE0000F );
I don't know if this cache flush is required at all. In case it is required, then no read from memory must happen before the start of the flush operation. The easiest way to ensure this is to do it right at the start before the first C function is called.
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