On Fri, 12 Mar 1999, Victor wrote:
>We have a project to add dynamic
>FPGA capability to RTL that got as far as running a jam port and then
>ran into time constraints. Dave Bonal, one of our star students here,
>is scheduled to revive this project this summer. I'd be thrilled if David could
>cooperate with you both.
>
>I am very interested in taking Henry Massalin's brilliant idea for the
>Synthesis OS and using it with FPGAs. Massalin's idea was, for example,
>to "compile" read/write routines for a particular file during "open".
>The result was very fast execution of read/write since constant propagation
>compacted the code. Instead of compiling code, we can generate state machines.
>So, in the most complex example, the user does a tcp "connect" and
>the OS generates a state machine for that tcp connection and maps control
>registers into the address space of process.
>For RT applictions, the possibilities are more obvious.
Now that is really pushing the software/hardware frontier sideways. Let's work
on it.
John
--
John Storrs, Laboratory for Micro Enterprise
125 Culham 1 Site, Culham, Abingdon OX14 3DA, UK
tel/fax 01865 407085 email [EMAIL PROTECTED]
www http://www.i-way.co.uk/~storrs
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