>On Fri, 12 Mar 1999, Victor wrote:
>>I am very interested in taking Henry Massalin's brilliant idea for the
>>Synthesis OS and using it with FPGAs. Massalin's idea was, for example,
>>to "compile" read/write routines for a particular file during "open".
>>The result was very fast execution of read/write since constant propagation
>>compacted the code. Instead of compiling code, we can generate state machines.
>>So, in the most complex example, the user does a tcp "connect" and
>>the OS generates a state machine for that tcp connection and maps control
>>registers into the address space of process.
>>For RT applictions, the possibilities are more obvious.
>
>Now that is really pushing the software/hardware frontier sideways. Let's work
>on it.
On further thought, I don't know of any ISP devices you can treat like RAM.
Don't they all have limited reprogrammability? In the case of Lattice, they
quote 10k times. This precludes real dynamic programming. You could kill the
device in about 10k seconds.
An illustration of the sort of dynamic application which would stay within the
reprogramming parameters is an RT-Linux latency tester. Consider a PCI target
card, with an application CPLD usually programmed for a user function which
fills the CPLD. You could reprogram the CPLD to provide a fast counter/timer
which triggers an RT-Linux interrupt handler. The timer would reset on
timeout/interrupt in the normal way, and start counting again. The handler
would read the current timer value as its initial action, and report it to
Linux space where it could be processed to obtain latency statistics.
In Linux space it should be possible to correlate these with the Linux
processes running at the time (which themselves could be managed).
John
--
John Storrs, Laboratory for Micro Enterprise
125 Culham 1 Site, Culham, Abingdon OX14 3DA, UK
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