Hi,
The Xilinx FPGA's have RAM based config.
You can (auto)Load them via Serial PROM or 8bit parr. Port.
There is a guy from Austria with parrallelport based AX25Modem i had a
talk with ( downloading Config Data through the StdLP to the Xilinx
device giving it ECP/EPP Capability and then doing bidi HighSpeed
transfers with his modem ( digital part in the XilinxFPGA as well) .
4-5 Years ago the people that are involved with OBERON published
something about and with "mutable" Hardware.
In my opinion the hitch with this is that you will need CPU time to
"assemble" your "hard"ware functionality. So there is not much sense
changing functionality every couple of milisecond.
In my experience Computing Cost for "Fitting" depend inversely on
granularity: CPLD(Lattice):low ....FPGA(Xilinx/Actel:HIGH).
If you only want to change IO methods i've seen a PC104 Module with
exactly this.
For the last 5 Years ( since Lattice produced their first ispLSI
devices/Software ) i have based all my custom Hardware on various
Lattice CPLDS ( mostly fast Statemachines and in conjunction with a FIFO
very fast RISC ( 5 to 10 distinct CMDs ) miniCPUs.
Nice Sunday
UK
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Uwe Klein [mailto:[EMAIL PROTECTED]]
KLEIN MESSGERAETE Habertwedt 1
D-24376 Groedersby b. Kappeln, GERMANY
phone: +49 4642 920 123 FAX: +49 4642 920 125
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