On Sat, Jul 10, 1999 at 04:15:51PM -0700, David Schleef wrote:
> On Fri, Jul 09, 1999 at 07:47:56PM -0600, Victor Yodaiken wrote:
> Personally, I think it is a hideous hack to use an 8254 in one-shot
> mode, an/or to use the ISA bus on a 400 Mhz computer.  And I've not


what's really immoral is that non-x86 boards are being made with 
isa-bus 8254s as timers.

> had someone show me that the IO-APICs are actually capable of decent
> timing.  IO-APICs have been on motherboards for several years, yet
> Linux still does not have an earliest-deadline first timer interrupt
> except with the UTIME patch, which uses the XT-PIC.

See beta 10, to be released in a couple of days.
The APIC timer is an on chip timer connected to the pentium "Advanced"
PIC. The io-apic is off chip. SMP intel design uses

i/o/devices -> io-apci -------serial irq bus----
                           |
                          on chip apic
               

On non-smp motherboards, evil board designers _disable_ the apic
so that the apic timer cannot be used. But, Manoj and others have 
discovered that the apic timer is available on smp boards, even when only
one processors is installed. However, I don't think it makes things 
so much better, unfortunately.  We'll see if tuning helps us.



> timers are not adequate, since you might miss any number of timer
> ticks between when you get the interrupt and when you reprogram
> the timer, even if you have low latency.

APIC is fast enough so that we treat it as one shot, even though we 
always leave it periodic.

> 
> 
> 
> 
> dave...
> 
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-- 

Victor Yodaiken
Socorro New Mexico
USA.

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