On 07 Dec 94 03:47:56 +0000, Johnathan Taylor said:
> > R1 R1 R1 R3
> > out <---+--###--+--###--+--###--+--###--<-- GND
> > | | | |
> > # # # #
> > #R2 #R2 #R2 #R2
> > | | | |
> > ^ ^ ^ ^
> > bit 3 bit 2 bit 1 bit 0
> I think you may not be taking into acount that when a bit is NOT high it is
> LOW and therefore the resistor connected to it is effectivly connected to
> ground and acts as a potential divider to any lesser significant bits voltage
> derrived from it's portion of the divider chain.
Umm... the circuit works whether or not any of the bits is high or low.
Your explanation of how it works should not depend on the values of the
bits.
> R3 is equal to an
> absolutely least-significant-bit set perminantly to zero so MUST be equal to
> 2R to be part of the R2R equation.
No. In that case the circuit would be
R1 R1 R1 R1
out <---+--###--+--###--+--###--+--###--+
| | | | |
# # # # #
#R2 #R2 #R2 #R2 #R2
| | | | |
^ ^ ^ ^ ^
bit 3 bit 2 bit 1 bit 0 GND
wouldn't it?
> Examining with just the lsb at 1 and the remaining 3 more significant bits
> set
> to 0... going from lsb to msb nodes the attenuation to 4dp is:-
> bit0 0.3354
> bit1 0.5098
> bit2 0.5455
> bit3 0.6666
> which in all is 0.06212 or 1/16.09 or probably exactly 1/16 if infinite
> presision maths is used.
Where do you get these numbers from?
> I'm not 100% certain that the unloaded output voltages accuratly represent
> the
> binary value but they are a close enough approximation to get away with it:-)
I've already told you that the circuit is mathematically correct.
> ie. in a real R2R ladder the lowest voltage that can be represented would be
> at least 0.6V with all bits set to 0 due to the ttl output stage used as
> voltage source.
Provided the low and high voltages are always the same (say, 1V and 4V)
you will still get an accurate result which lies between the low and high
voltages.
imc
