> That had been my thinking - disable the SAM's z80 and hang a > different z80 off the back... then I could trap and memory > writes before they reach the ASIC.
That can be done by making /BUSREQ low and let your hardware wait for /BUSACK Use pullup resistors with the control lines (/M1/RD,/WR,/MREQ/,/IOREQ etc) for transparant bus during /BUSREQ. use the sams Z80 /WAIT with your Z80 to prevent collission. Latch interrupt status using /M1=0 AND /MREQ=0 AND databus= 1111x011 X=1 for EI or 0 for DI. Let NMI occure and Latch address (=Z80 program counter) during /M1=0 AND /MREQ=0 and /ROMCS=1(NO ROM) A15=0 (prevent use of ROM, external RAM and location D (prevent RAM overflow to ROM possibility). Copy some RAM from the latched address and replace it with your SNAP code starting with 5 DIs to make sure interrupts are disabled (instruction at the /M1 cycle could be up to 4 bytes long). let the SAM continue to execute your SNAP code which saves the SAM Z80 registers and jumps to your snap ROM. Edwin Blink [EMAIL PROTECTED] http://www.designing.myweb.nl/samcoupe/
