Dnia 00-08-03 Edwin Blink pisze: > That can be done by making /BUSREQ low and let your hardware > wait for /BUSACK You mean always or while NMI activation?
> Latch interrupt status using /M1=0 AND /MREQ=0 AND > databus=1111x011 X=1 for EI or 0 for DI. What for? This can be read with LD A,I and fail while execution of INT code (INT are disabled not only with DI). > Let NMI occure and Latch address (=Z80 program counter) during > /M1=0 AND /MREQ=0 and /ROMCS=1(NO ROM) A15=0 (prevent use of > ROM, external RAM and location D (prevent RAM overflow to ROM > possibility). When NMI occures, next opcode taken is from &0066. > Copy some RAM from the latched address With what? The second CPU or dedicated DMA? -- Yarek.
