On 26 April 2011 15:11, Tommo H <tomh.retros...@gmail.com> wrote: > > On 26 Apr 2011, at 14:38, Geoff Winkless <sam-us...@geoff.dj> wrote: > > On 26 April 2011 14:23, Tommo H < <tomh.retros...@gmail.com> > tomh.retros...@gmail.com> wrote: >> >> The 25fps is based on a hypothetical chip having the same access as the >> CPU does currently. >> > > But would still take up the majority of the bus time, meaning you couldn't > do anything _else_. > > > And at present, if you want to scroll the screen you can't do anything else > and you also can't really scroll the screen. I forget the exact numbers, but > you get about 79,000 memory access cycles a frame, don't you? So if a > hypothetical device which uses every access cycle, that's enough bandwidth > to read and write every byte on the display more than three times in a > single frame. >
Umm... Well you can't read and write the same byte in the same cycle; but you're right, if the 79000 frames figure is correct that would be usable. However I'm not sure it is: system clock is 6MHz, so 6M T-states per second, that's 120,000 every frame (6M/50). That's about 30,000 memory cycles in screen-off. If you were going to invest in significant graphics hardware you'd be better off with scalable hardware sprites that aren't in system memory at all and having a 4-colour screen and using full 128-colour sprites for the interesting stuff. Admittedly they don't help you with 3d but at least you'd have half the memory to move around and half the contention to worry about. G
