Re: [U-Boot] nand_plat extensions with GPIO framework

2010-06-09 Thread Thomas Chou
Mike Frysinger wrote:
 i'll try and generalize them a bit more and send thing out.  not sure if 
 you'll find any of these useful though.
 -mike

Hi Mike,

I believe it will be very useful. We are using gpio for led, key switch, 
i2c, nand flash status and other bit-oriented i/o.

Cheers,
Thomas
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Re: [U-Boot] [PATCH 1/4] Atmel Dataflash: convert to C struct accessors

2010-06-09 Thread Thomas Petazzoni
On Tue, 8 Jun 2010 15:20:57 -0400
Mike Frysinger vap...@gentoo.org wrote:

 speaking historically, the dataflash code absolutely has its place.
 it existed long before the SPI flash framework.  but i'm looking
 forward only now.

Yes, of course, understood.

However, the Dataflash aren't normal SPI flash, they don't have the
same opcodes. For example, drivers/mtd/spi/spi_flash.c assumes that it
can probe the ID code of the SPI flash by sending the CMD_READ_ID
(0x9F) command (in spi_flash_probe()). This works for SPI flashes, but
not for Dataflashes. The identification of Dataflashes takes place with
command GET_STATUS (0xD7) in drivers/mtd/at45.c, which has a different
return value than the 0x9F command of SPI flashes. Am I missing
something ?

In terms of code infrastructure/organization, how do you suggest to
handle this ?

 i think the first step would be to convert the boards we can and
 leave a #warning for the rest that the dataflash code is being killed
 off.  then after some time, if no one has fixed the remainders, we do
 our best to convert them. -mike

Ok.

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com


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Re: [U-Boot] Rescue /alternative boot

2010-06-09 Thread Arno Steffen
Dear Wolfgang Denk,

thanks for your mail.

2010/6/8 Wolfgang Denk w...@denx.de:
 Why should flashing of uboot-environment fail? If you configure for
 redundant environment, you should always at least have the previous
 copy of the settings).

Right, but what happens if user is doing something stupid?
I don't have any connection to uboot at all, as in my final system
there is no serial interface to change it back.
If linux is not booting anymore I am lost, as this is my only known
way to reflash uboot env, kernel, filesystem.

 updates from TFTP server etc. - Have a look at the manual for details.

I would see tftpboot as a chance - but there are a few questions to me:
- howto call this (and where?) in uboot code? It must be executed
before reading the uboot-environment, as this can misconfigured. So it
cannot be part of environment.
- howto handle boot/kernel parameters? I only know the way via
environment variables
- the timeout has to set to be very small (as this otherwise in 99%
slow down the boot process to much)

This tftpboot look smart - if I could manage this (see above).

Best regards
Arno
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Re: [U-Boot] Fw:Re: Fw:How can I use yaffs2 in uboot

2010-06-09 Thread Wolfgang Denk
Dear jackfriend,

In message 50c70a8a.5b18.1291ad2050a.coremail.jackfri...@163.com you wrote:
 
 Sounds like a pretty clear error message - doesn't it?
 
 Increase CONFIG_SYS_MALLOC_LEN in your bard config file.
 
 [It might make sense to improve the error message in
 fs/yaffs2/yaffs_guts.c to include information how many bytes were to
 be allocated, so you get an idea on how uch to increase the malloc
 arena size.]
 
 Best regards,
 
 Wolfgang Denk
 
 thanks a lot
 
 
 Change CONFIG_SYS_MALLOC_LEN ,Now I can write  a yaffs2 file system image 
 (59M) in nand flash  (/flash/a )

Please use quoting so one can see what was written by you and what was
written by others. And remove unneeded lines. See
http://www.netmeister.org/news/learn2quote.html


 but The Linux how to find the file system image?(the system  support yaffs2)
 
 set bootargs noinitrd root=/dev/mtdblock3 rootfstype=yaffs2 rw 
 console=ttySAC0,115200 init=/linuxrc mem=64M

And how are your MTD partitions set up in Linux?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
(null cookie; hope that's ok)
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Re: [U-Boot] Rescue /alternative boot

2010-06-09 Thread Wolfgang Denk
Dear Arno Steffen,

In message aanlktinq24uol7n6j14urgqnxojoqvpt2fvnjjrgq...@mail.gmail.com you 
wrote:

  Why should flashing of uboot-environment fail? If you configure for
  redundant environment, you should always at least have the previous
  copy of the settings).
 
 Right, but what happens if user is doing something stupid?

Well, you can provide measures for a reset to a sane state, then.

 I don't have any connection to uboot at all, as in my final system
 there is no serial interface to change it back.

You could eventually use netconsole.

 If linux is not booting anymore I am lost, as this is my only known
 way to reflash uboot env, kernel, filesystem.

If just the environment is hosed, it would be sufficient to provide
some means to perform a manufacturer reset and restore the
environment to a known good state. You could - for example - act on
certain key presses / key combinations when the board is
reset/powered on. Several boards do that.

There has also been discussions for an extension to perform a reset of
the envrionment (env default, if I remember correctly).

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
 The software required `Windows 95 or better', so I installed Linux.
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[U-Boot] [PATCH 1/2] avr32: fix linking of atstk100x and favr32 boards

2010-06-09 Thread Andreas Bießmann
When building some avr32 boards out of tree (e.g. O=..) the linker script could
not be found. This patch references the linker script in source tree.

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 board/atmel/atstk1000/config.mk|2 +-
 board/earthlcd/favr-32-ezkit/config.mk |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/atmel/atstk1000/config.mk b/board/atmel/atstk1000/config.mk
index ec3618d..40e55fe 100644
--- a/board/atmel/atstk1000/config.mk
+++ b/board/atmel/atstk1000/config.mk
@@ -1,4 +1,4 @@
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
 PLATFORM_LDFLAGS   += --gc-sections
 TEXT_BASE  = 0x
-LDSCRIPT   = $(obj)board/atmel/atstk1000/u-boot.lds
+LDSCRIPT   = $(src)board/atmel/atstk1000/u-boot.lds
diff --git a/board/earthlcd/favr-32-ezkit/config.mk 
b/board/earthlcd/favr-32-ezkit/config.mk
index 2337d62..5c919cd 100644
--- a/board/earthlcd/favr-32-ezkit/config.mk
+++ b/board/earthlcd/favr-32-ezkit/config.mk
@@ -1,4 +1,4 @@
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
 PLATFORM_LDFLAGS   += --gc-sections
 TEXT_BASE  = 0x
-LDSCRIPT   = $(obj)board/earthlcd/favr-32-ezkit/u-boot.lds
+LDSCRIPT   = $(src)board/earthlcd/favr-32-ezkit/u-boot.lds
-- 
1.7.1

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[U-Boot] DRAM error when enable #define CONFIG_SPLASH_SCREEN

2010-06-09 Thread Tommy Agustianto
for enabling splash screen on my board (mpx8349) I enabled
the splash screen config in file configuration.

the binary was succesfully flashed to the board
but when I start the uboot, I got this message :

U-Boot 2009.01-dirty (Jun 09 2010 - 10:19:28) MPC83XX

Reset Status:

CPU:   e300c1, MPC8349EA, Rev: 3.0 at 396 MHz, CSB: 264 MHz
Board: MPX8349
PCI1:  32 bit, 33 MHz
SRAM:   1 MB
I2C:   ready
DRAM:  *** failed ***
### ERROR ### Please RESET the board ###


and I'd like to know, what the meaning of 'dirty' on the U-Boot title.
what more that I must configure to enabling splash screen or bitmap support?
like memory init..etc..


Thanks

--
success isn't a destination but its a journey


    Tommy Agustianto
  Electronics Engineer.


http://xsatria.wordpress.com
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[U-Boot] [PATCH 2/2] avr32: add unaligned.h

2010-06-09 Thread Andreas Bießmann
This patch fixes following error:

zlib.c:31:27: error: asm/unaligned.h: No such file or directory

Suggested-by: Mike Frysinger vap...@gentoo.org
Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 arch/avr32/include/asm/unaligned.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
 create mode 100644 arch/avr32/include/asm/unaligned.h

diff --git a/arch/avr32/include/asm/unaligned.h 
b/arch/avr32/include/asm/unaligned.h
new file mode 100644
index 000..6cecbbb
--- /dev/null
+++ b/arch/avr32/include/asm/unaligned.h
@@ -0,0 +1 @@
+#include asm-generic/unaligned.h
-- 
1.7.1

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Re: [U-Boot] Rescue /alternative boot

2010-06-09 Thread Arno Steffen
Dear Wolfgang Denk,

 Well, you can provide measures for a reset to a sane state, then.

This sounds even more complicated to me. In fact - I don't have any
clue, what and howto measure and reset the environment. This system
doesn't even had a reset buttom... so it is always a cold boot.

 I don't have any connection to uboot at all, as in my final system
 there is no serial interface to change it back.

 You could eventually use netconsole.

Netconsole requires (afaik) a linux kernel, that is working.

 If just the environment is hosed, it would be sufficient to provide
 some means to perform a manufacturer reset and restore the
 environment to a known good state. You could - for example - act on
 certain key presses / key combinations when the board is
 reset/powered on. Several boards do that.

I would do so, in fact that was my first idea. But I just have
network, nothing else.
But here I am at the beginning. How to listen on a network port ( I
know what to don in linux, but in uboot?) and howto make this change
in uboot environment to a certain state. (this can boot a system via
tftp then instead of a flash file system)

Best regards
Steffen
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Re: [U-Boot] Rescue /alternative boot

2010-06-09 Thread Arno Steffen
Dear Albert,

2010/6/9 Albert ARIBAUD albert.arib...@free.fr:
 If the user is able to do something stupid then you should avoid it, e.g.
 not give the user the ability to alter the u-boot environment by making it

In fact, the normal user doesn't have access to change it. But even I
can make faults.

 You should consider accessibility to the bootloader prompt as a critical
 requirement before considering resiliency -- actually, access to U-boot is a
 last-resort, but good, response to the resiliency requirement.

I am not free to change this anymore. So I have to find another way via network.

 Why can you not trust the u-boot environment? Maybe hardening the system
 against user-induced environment changes would help avoid the condition in
 the first place.

The system must be ready for updates - and they might go wrong, even by a typo.

 - howto handle boot/kernel parameters? I only know the way via
 environment variables

 As Wolfgang pointed out, read the manual: passing parameters does not depend
 on how you got the image in the first place, and works the same whether you
 use TFTP, flash or hard disks.

In manual I just can see how to set commandline parameters. Everything
( I understand until now) is controled via environment.
I have to put some code (before the environment is read) into uboot
source to force a tftpboot with in-compiled parameters. And I don't
have a clue howto and where to do this.
It is not enough to set some default environment, as this becomes
active only if CRC is failed. This will not help against a typo in the
setting.

Best regards
Arno
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[U-Boot] [PATCH 4/4] musb: Program extvbus for OMAP3EVM Rev = E

2010-06-09 Thread Ajay Kumar Gupta
OMAP3EVM Rev =E uses external Vbus supply so setting 'extvbus'
to '1' for OMAP3EVM Rev =E runtime based on EVM revision.

Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
 board/ti/evm/evm.c   |   13 +
 drivers/usb/musb/omap3.c |3 +++
 drivers/usb/musb/omap3.h |4 
 3 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index fcc1803..9948b9c 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -65,6 +65,19 @@ static void omap3_evm_get_revision(void)
 }
 
 /*
+ * MUSB port on OMAP3EVM Rev = E requires extvbus programming.
+ */
+u8 omap3_evm_need_extvbus(void)
+{
+   u8 retval = 0;
+
+   if (get_omap3_evm_rev() = OMAP3EVM_BOARD_GEN_2)
+   retval = 1;
+
+   return retval;
+}
+
+/*
  * Routine: board_init
  * Description: Early hardware init.
  */
diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
index 785629c..a983552 100644
--- a/drivers/usb/musb/omap3.c
+++ b/drivers/usb/musb/omap3.c
@@ -119,6 +119,9 @@ int musb_platform_init(void)
stdby = ~OMAP3_OTG_FORCESTDBY_STANDBY;
writel(stdby, otg-forcestdby);
 
+#ifdef CONFIG_OMAP3_EVM
+   musb_cfg.extvbus = omap3_evm_need_extvbus();
+#endif
platform_needs_initialization = 0;
}
 
diff --git a/drivers/usb/musb/omap3.h b/drivers/usb/musb/omap3.h
index b591862..c934e0c 100644
--- a/drivers/usb/musb/omap3.h
+++ b/drivers/usb/musb/omap3.h
@@ -44,4 +44,8 @@
 
 int musb_platform_init(void);
 
+#ifdef CONFIG_OMAP3_EVM
+extern u8 omap3_evm_use_extvbus(void);
+#endif
+
 #endif /* _MUSB_OMAP3_H */
-- 
1.6.2.4

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[U-Boot] [PATCH 2/4 v2] musb: Add Phy programming for using external Vbus

2010-06-09 Thread Ajay Kumar Gupta
MUSB PHY on OMAP3EVM Rev = E uses external Vbus supply to support
500mA of power.We need to program MUSB PHY to use external Vbus
for this purpose.

Adding 'extvbus' member in musb_config structure which should be set
by all the boards where MUSB interface is using external Vbus supply.

Also added ULPI bus control register read/write abstraction for
Blackfin processor as it doesn't have ULPI registers.

Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
Changes from v1:
- Added ULPI register read/write abstraction for Blackfin.
 
 drivers/usb/musb/musb_core.c |7 +++
 drivers/usb/musb/musb_core.h |   28 +++-
 2 files changed, 34 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 7766069..dc740cf 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -34,6 +34,7 @@ void musb_start(void)
 {
 #if defined(CONFIG_MUSB_HCD)
u8 devctl;
+   u8 busctl;
 #endif
 
/* disable all interrupts */
@@ -45,6 +46,12 @@ void musb_start(void)
/* put into basic highspeed mode and start session */
writeb(MUSB_POWER_HSENAB, musbr-power);
 #if defined(CONFIG_MUSB_HCD)
+   /* Program PHY to use EXT VBUS if required */
+   if (musb_cfg.extvbus == 1) {
+   busctl = musb_read_ulpi_buscontrol(musbr);
+   musb_write_ulpi_buscontrol(musbr, busctl | ULPI_USE_EXTVBUS);
+   }
+
devctl = readb(musbr-devctl);
writeb(devctl | MUSB_DEVCTL_SESSION, musbr-devctl);
 #endif
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 9a1fb4f..a63428b 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -112,7 +112,10 @@ struct musb_regs {
u16 rxfifoadd;
u32 vcontrol;
u16 hwvers;
-   u16 reserved2[5];
+   u16 reserved2a[1];
+   u8  ulpi_busctl;
+   u8  reserved2b[1];
+   u16 reserved2[3];
u8  epinfo;
u8  raminfo;
u8  linkinfo;
@@ -181,6 +184,10 @@ struct musb_regs {
 #define MUSB_DEVCTL_HR 0x02
 #define MUSB_DEVCTL_SESSION0x01
 
+/* ULPI VBUSCONTROL */
+#define ULPI_USE_EXTVBUS   0x01
+#define ULPI_USE_EXTVBUSIND0x02
+
 /* TESTMODE */
 #define MUSB_TEST_FORCE_HOST   0x80
 #define MUSB_TEST_FIFO_ACCESS  0x40
@@ -341,6 +348,7 @@ struct musb_config {
struct  musb_regs   *regs;
u32 timeout;
u8  musb_speed;
+   u8  extvbus;
 };
 
 /* externally defined data */
@@ -361,6 +369,24 @@ extern void read_fifo(u8 ep, u32 length, void *fifo_data);
 # define readb(addr) (u8)bfin_read16(addr)
 # undef  writeb
 # define writeb(b, addr) bfin_write16(addr, b)
+/*
+ * The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY.
+ * However, it has no ULPI support - so there are no registers at all.
+ * That means accesses to ULPI_BUSCONTROL have to be abstracted away.
+ */
+static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
+{}
+static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
+{}
+#else
+static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
+{
+   return readb(musbr-ulpi_busctl);
+}
+static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
+{
+   writeb(val, musbr-ulpi_busctl);
+}
 #endif
 
 #endif /* __MUSB_HDRC_DEFS_H__ */
-- 
1.6.2.4

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[U-Boot] [PATCH 1/4 v2] musb: Use name based initialization for musb_config

2010-06-09 Thread Ajay Kumar Gupta
Changed musb_config initialization for omap3.c, davinci.c
and da8xx.c using name of structure fields. This would cause
the uninitialized field to be null by default and thus would
help in avoiding to init some flags required to be set only
for a few selected platforms.

CC: Remy Bohmer li...@bohmer.net
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
 drivers/usb/musb/da8xx.c   |6 +++---
 drivers/usb/musb/davinci.c |6 +++---
 drivers/usb/musb/omap3.c   |6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
index 40bfe44..617d88e 100644
--- a/drivers/usb/musb/da8xx.c
+++ b/drivers/usb/musb/da8xx.c
@@ -27,9 +27,9 @@
 
 /* MUSB platform configuration */
 struct musb_config musb_cfg = {
-   (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
-   DA8XX_USB_OTG_TIMEOUT,
-   0
+   .regs   = (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
+   .timeout= DA8XX_USB_OTG_TIMEOUT,
+   .musb_speed = 0,
 };
 
 /*
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index 8fbadc9..f56f2df 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -28,9 +28,9 @@
 
 /* MUSB platform configuration */
 struct musb_config musb_cfg = {
-   (struct musb_regs *)MENTOR_USB0_BASE,
-   DAVINCI_USB_TIMEOUT,
-   0
+   .regs   = (struct musb_regs *)MENTOR_USB0_BASE,
+   .timeout= DAVINCI_USB_TIMEOUT,
+   .musb_speed = 0,
 };
 
 /* MUSB module register overlay */
diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
index 3bfd0a0..785629c 100644
--- a/drivers/usb/musb/omap3.c
+++ b/drivers/usb/musb/omap3.c
@@ -36,9 +36,9 @@
 static int platform_needs_initialization = 1;
 
 struct musb_config musb_cfg = {
-   (struct musb_regs *)MENTOR_USB0_BASE,
-   OMAP3_USB_TIMEOUT,
-   0
+   .regs   = (struct musb_regs *)MENTOR_USB0_BASE,
+   .timeout= OMAP3_USB_TIMEOUT,
+   .musb_speed = 0,
 };
 
 /*
-- 
1.6.2.4

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[U-Boot] [PATCH 3/4 v2] omap3evm: Add board revision function

2010-06-09 Thread Ajay Kumar Gupta
Added function to differentiate between the OMAP3EVM revisions. The
chip-id of the ethernet PHY is being used for this purpose.

Rev A to D : 0x0115
Rev = E   : 0x9220

CC: Remy Bohmer li...@bohmer.net
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Sanjeev Premi pr...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
Changes from v1:
- Fixed the signed-off-by: mail ids

 board/ti/evm/evm.c |   30 ++
 board/ti/evm/evm.h |   14 ++
 2 files changed, 44 insertions(+), 0 deletions(-)

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index 0718a08..fcc1803 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -37,6 +37,33 @@
 #include asm/mach-types.h
 #include evm.h
 
+static u8 omap3_evm_version;
+
+u8 get_omap3_evm_rev(void)
+{
+   return omap3_evm_version;
+}
+
+static void omap3_evm_get_revision(void)
+{
+   unsigned int smsc_id;
+
+   /* Ethernet PHY ID is stored at ID_REV register */
+   smsc_id = readl(CONFIG_SMC911X_BASE + 0x50)  0x;
+   printf(Read back SMSC id 0x%x\n, smsc_id);
+
+   switch (smsc_id) {
+   /* SMSC9115 chipset */
+   case 0x0115:
+   omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
+   break;
+   /* SMSC 9220 chipset */
+   case 0x9220:
+   default:
+   omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
+   }
+}
+
 /*
  * Routine: board_init
  * Description: Early hardware init.
@@ -121,6 +148,9 @@ static void setup_net_chip(void)
writel(GPIO0, gpio3_base-cleardataout);
udelay(1);
writel(GPIO0, gpio3_base-setdataout);
+
+   /* determine omap3evm revision */
+   omap3_evm_get_revision();
 }
 
 int board_eth_init(bd_t *bis)
diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h
index 37da29d..e2581f6 100644
--- a/board/ti/evm/evm.h
+++ b/board/ti/evm/evm.h
@@ -33,6 +33,20 @@ const omap3_sysinfo sysinfo = {
 #endif
 };
 
+/*
+ * OMAP35x EVM revision
+ * Run time detection of EVM revision is done by reading Ethernet
+ * PHY ID -
+ *  GEN_1   = 0x0115
+ *  GEN_2   = 0x9220
+ */
+enum {
+   OMAP3EVM_BOARD_GEN_1 = 0,   /* EVM Rev between  A - D */
+   OMAP3EVM_BOARD_GEN_2,   /* EVM Rev = Rev E */
+};
+
+u8 get_omap3_evm_rev(void);
+
 static void setup_net_chip(void);
 
 /*
-- 
1.6.2.4

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Re: [U-Boot] Rescue /alternative boot

2010-06-09 Thread Wolfgang Denk
Dear Arno Steffen,

In message aanlktin-oagocd6_sk5t-si9e16-hqdzm-e9f3v2o...@mail.gmail.com you 
wrote:
 
 This sounds even more complicated to me. In fact - I don't have any
 clue, what and howto measure and reset the environment. This system
 doesn't even had a reset buttom... so it is always a cold boot.

So how will you find out if there is something wrong, and a reset to a
default state is indeed wanted?

  You could eventually use netconsole.
 
 Netconsole requires (afaik) a linux kernel, that is working.

We have netconsole support in U-Boot.

 But here I am at the beginning. How to listen on a network port ( I
 know what to don in linux, but in uboot?) and howto make this change
 in uboot environment to a certain state. (this can boot a system via
 tftp then instead of a flash file system)

Consider using netconsole then.

Best regards,

Wolfgang Denk

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[U-Boot] Linux kernel only reporting 16M / 128M

2010-06-09 Thread Kristoffer Ericson
Greetings,

My flashing issues are now gone and will adress this later on.

Anyhow, I noticed that linux kernel only reports 16M total memory while the 
board
got 128M. Was just wondering where to start looking? Everything works fine 
inside u-boot
so its not passed correctly or something, not sure how the linux kernel detects 
that.

Any thoughts are helpful.

Best wishes
Kristoffer
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Re: [U-Boot] Rescue /alternative boot

2010-06-09 Thread Wolfgang Denk
Dear Arno Steffen,

In message aanlktim0kjsnkohhm9yst8xjtnm4yino38s35qbxd...@mail.gmail.com you 
wrote:
 
 The system must be ready for updates - and they might go wrong, even by a 
 typo.

Then you must design the system to be robust and ready for such
procedures; for example, you want to have a hardware watchdog that
resets the board if something goes wrong.

 In manual I just can see how to set commandline parameters. Everything
 ( I understand until now) is controled via environment.
 I have to put some code (before the environment is read) into uboot
 source to force a tftpboot with in-compiled parameters. And I don't
 have a clue howto and where to do this.
 It is not enough to set some default environment, as this becomes
 active only if CRC is failed. This will not help against a typo in the
 setting.

The aforementioned env default command would alow to manually reset
the environment to default settings, for example as last resort of
recovery after a certain number of watchdog resets has been detected.

But if your environment is really hosed, including the backup copy,
then you are probably lost anyway. Foir example, how would you
communicate over Ethernet, when there is no longer a valid MAC
address in your environment?


Best regards,

Wolfgang Denk

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Re: [U-Boot] Linux kernel only reporting 16M / 128M

2010-06-09 Thread Wolfgang Denk
Dear Kristoffer Ericson,

In message 20100609110742.ga1...@boggieman you wrote:
 
 My flashing issues are now gone and will adress this later on.

So the cause of the problems was the missing enabling of Vpp ?

 Anyhow, I noticed that linux kernel only reports 16M total memory while the 
 board
 got 128M. Was just wondering where to start looking? Everything works fine 
 inside u-boot
 so its not passed correctly or something, not sure how the linux kernel 
 detects that.

You RAM initialization in U-Boot seems to be broken. Check the number
of rows/columns you program into your memory controller.

Best regards,

Wolfgang Denk

-- 
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Re: [U-Boot] Linux kernel only reporting 16M / 128M

2010-06-09 Thread Kristoffer Ericson
On Wed, Jun 09, 2010 at 01:23:19PM +0200, Wolfgang Denk wrote:
 Dear Kristoffer Ericson,
 
 In message 20100609110742.ga1...@boggieman you wrote:
  
  My flashing issues are now gone and will adress this later on.
 
 So the cause of the problems was the missing enabling of Vpp ?

So it seems, works fine now.
 
  Anyhow, I noticed that linux kernel only reports 16M total memory while the 
  board
  got 128M. Was just wondering where to start looking? Everything works fine 
  inside u-boot
  so its not passed correctly or something, not sure how the linux kernel 
  detects that.
 
 You RAM initialization in U-Boot seems to be broken. Check the number
 of rows/columns you program into your memory controller.
 

Hmm, will do that. However it seems to work fine in u-boot, I can see and 
access all memory.
Also, the bootargs are not getting passed to the kernel, so might be same for 
memory tag?



 Best regards,
 
 Wolfgang Denk
 
 -- 
 DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
 HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
 Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] Linux kernel only reporting 16M / 128M

2010-06-09 Thread Kristoffer Ericson
On Wed, Jun 09, 2010 at 01:23:19PM +0200, Wolfgang Denk wrote:
 Dear Kristoffer Ericson,
 
 In message 20100609110742.ga1...@boggieman you wrote:
  
  My flashing issues are now gone and will adress this later on.
 
 So the cause of the problems was the missing enabling of Vpp ?
 
  Anyhow, I noticed that linux kernel only reports 16M total memory while the 
  board
  got 128M. Was just wondering where to start looking? Everything works fine 
  inside u-boot
  so its not passed correctly or something, not sure how the linux kernel 
  detects that.
 
 You RAM initialization in U-Boot seems to be broken. Check the number
 of rows/columns you program into your memory controller.

It works now, had missed exporting the bootparams adress in my 
board init. :)

 
 Best regards,
 
 Wolfgang Denk
 
 -- 
 DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
 HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
 Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
 Weekends were made for programming. - Karl Lehenbauer
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Re: [U-Boot] Unable to mount Root File System , initramdisk or initramfs

2010-06-09 Thread Detlev Zundel
Hi Gurumurthy,

 I am using MIPS32 AU1350 processor board with 2MB of NOR Flash, I have
 programmed u-boot and Linux kernel in NOR Flash. U-boot is working
 able to boot linux kernel but not able to mount root filesystem from
 SDRAM.

 I tried both initramdisk and initramfs. please let me know more info
 about this.

 I have created uRamdisk and also passed boot arguments.

 Below is the error log. let me know whether I am missing something.

Well you really need to debug the Linux kernel and especially the
parameter passing from U-Boot to Linux on the MIPS architecture to find
out why the kernel does not find the ramdisk (i.e. check
do_bootm_linux() in arch/mips/lib/bootm.c).

On PowerPC we used to have registers r4 and r5 specifying the address
and length of the ramdisk which was set on calling Linux.  Maybe MIPS
needs something similar.  Becuase in recent U-Boot versions, the boot
code was completely rewritten, you should trace all activity of the
bootm U-Boot command before it calls the linux kernel in
do_bootm_linux() and ensure that the expectations of the Linux kernel
are met.

Cheers
  Detlev

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[U-Boot] Is it possible to use 1GB or DDR on MPC8360 with e300 core?

2010-06-09 Thread remya pillai
Hi all

I have an mpc8360e processor (has e300 core and QE) for our networking
application. I have to use 1GB DRAM module in my board, but u-boot for
powerpc is not supporting that. It is supporting only 256MB DRAM module.

And in kernel, /proc/meminfo gives me only 256MB.

Is it a processor limitation? Is there any other way to do memory map, than
address translation method?

Please help me out to solve this

Regards
sjremya
  [image: sjremya is offline]
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[U-Boot] [PATCH] avr32: disable branch folding

2010-06-09 Thread y
From: Andreas Bießmann biessm...@corscience.de

Due to a hardware bug mentioned in latest AP7000 datasheet errata
(revision M from 09.09) branch folding is unreliable.
This patch disables CPUCR.FE bitfield as stated in datasheet.

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---
 arch/avr32/cpu/start.S |7 ---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/avr32/cpu/start.S b/arch/avr32/cpu/start.S
index d37a46e..3d73196 100644
--- a/arch/avr32/cpu/start.S
+++ b/arch/avr32/cpu/start.S
@@ -27,9 +27,10 @@
 #define SYSREG_MMUCR_S_OFFSET  4
 
 #define SR_INIT (SYSREG_BIT(GM) | SYSREG_BIT(EM) | SYSREG_BIT(M0))
-#define CPUCR_INIT (SYSREG_BIT(BI) | SYSREG_BIT(BE)\
-   | SYSREG_BIT(FE) | SYSREG_BIT(RE)   \
-   | SYSREG_BIT(IBE) | SYSREG_BIT(IEE))
+// due to errata (unreliable branch folding) set FE bit to '0'
+#define CPUCR_INIT ((SYSREG_BIT(BI) | SYSREG_BIT(BE)   \
+   | SYSREG_BIT(RE)   |  SYSREG_BIT(IBE)   \
+   | SYSREG_BIT(IEE))  ~SYSREG_BIT(FE))
 
/*
 * To save some space, we use the same entry point for
-- 
1.7.1

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[U-Boot] [PATCH v2] avr32: disable branch folding

2010-06-09 Thread Andreas Bießmann
Due to a hardware bug mentioned in latest AP7000 datasheet errata
(revision M from 09.09) branch folding is unreliable.
This patch disables CPUCR.FE bitfield as stated in datasheet.

Signed-off-by: Andreas Bießmann biessm...@corscience.de
---

 Changes since v1:
  - fix comment

 arch/avr32/cpu/start.S |7 ---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/avr32/cpu/start.S b/arch/avr32/cpu/start.S
index d37a46e..99c9e06 100644
--- a/arch/avr32/cpu/start.S
+++ b/arch/avr32/cpu/start.S
@@ -27,9 +27,10 @@
 #define SYSREG_MMUCR_S_OFFSET  4
 
 #define SR_INIT (SYSREG_BIT(GM) | SYSREG_BIT(EM) | SYSREG_BIT(M0))
-#define CPUCR_INIT (SYSREG_BIT(BI) | SYSREG_BIT(BE)\
-   | SYSREG_BIT(FE) | SYSREG_BIT(RE)   \
-   | SYSREG_BIT(IBE) | SYSREG_BIT(IEE))
+/* due to errata (unreliable branch folding) clear FE bit explicitly */
+#define CPUCR_INIT ((SYSREG_BIT(BI) | SYSREG_BIT(BE)   \
+   | SYSREG_BIT(RE)   |  SYSREG_BIT(IBE)   \
+   | SYSREG_BIT(IEE))  ~SYSREG_BIT(FE))
 
/*
 * To save some space, we use the same entry point for
-- 
1.7.1

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Re: [U-Boot] BDI2000 Procedure

2010-06-09 Thread Detlev Zundel
Hi Mark,

 Does anyone have a procedure to restore u-boot on a AMCC Canyonlands
 board using the BDI2000?

 I have the bdisetup utility and the firmware/logic files for ppc4xx.  I
 also found the config files for BDI2000 but there is not a procedure to
 program it.  

 I have not used our BDI programmer before so this may be a stupid
 question but I need to restore the image on a couple of boards now.

If you have setup the config file including the amount of nor flash to
erase and the filename to load, it can boil down to erase followed  by
prog in the telnet prompt :)

Check the erase, file, format lines in [flash].  Manually in the
telnet interface you should be able to do an (untested)

erase 0xfffa
erase 0xfffc
erase 0xfffe
prog 0xfffa canyonlands/u-boot.bin bin

Cheers
  Detlev

-- 
I shall be telling this with a sigh / Somewhere ages and ages hence: /
Two roads diverged in a wood, and I-- / I took the one less traveled by, /
And that has made all the difference.  -- Robert Frost
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Re: [U-Boot] DRAM error when enable #define CONFIG_SPLASH_SCREEN

2010-06-09 Thread Detlev Zundel
Hi Tommy,

 for enabling splash screen on my board (mpx8349) I enabled
 the splash screen config in file configuration.

Hm, what board is that exactly?  I cannot find a reference to mpx8349
in current code nor does git grep MPX8349 yield any output.  Is it
possible that you use a non-mainline U-Boot tree?

 the binary was succesfully flashed to the board
 but when I start the uboot, I got this message :

 U-Boot 2009.01-dirty (Jun 09 2010 - 10:19:28) MPC83XX

 Reset Status:

 CPU:   e300c1, MPC8349EA, Rev: 3.0 at 396 MHz, CSB: 264 MHz
 Board: MPX8349
 PCI1:  32 bit, 33 MHz
 SRAM:   1 MB
 I2C:   ready
 DRAM:  *** failed ***
 ### ERROR ### Please RESET the board ###


 and I'd like to know, what the meaning of 'dirty' on the U-Boot title.

Check tools/setlocalversion.  Basically -dirty is appended when git
tells us that we have uncommitted changes in the local tree.  In essence
this tells us developers that the version you use is modified with
respect to the version 2009.01 that we know.

 what more that I must configure to enabling splash screen or bitmap support?
 like memory init..etc..

It seems non-obvious that the error stems from the SPLASH_SCREEN option.
Are you sure that the board works correct without this option?  A good
starting point would be to look into the changes against the mainline
U-Boot code ;)

Cheers
  Detlev

-- 
Or go for generality ... Add a programming language for extensibility
and write part of the program in that language.
--- GNU Coding Standards
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[U-Boot] Fw:Re: Fw:Re: Fw:How can I use yaffs2 in uboot

2010-06-09 Thread jackfriend

 And how are your MTD partitions set up in Linux?


 [*]   MTD partitioning support   
   RedBoot partition table parsing
 
  [*] Command line partition table parsing  

TI AR7 partitioning support   

static struct mtd_partition mini2440_default_nand_part[] __initdata = {
[0] = {
.name   = u-boot,
.size   = SZ_256K + SZ_128K,
.offset = 0,
},
[1] = {
.name   = u-boot-env,
.size   = SZ_128K,
.offset = SZ_256K + SZ_128K,
},
[2] = {
.name   = kernel,
/* 5 megabytes, for a kernel with no modules
 * or a uImage with a ramdisk attached */
.size   = 0x0050,
.offset = SZ_512K,
},
[3] = {
.name   = root,
.offset = SZ_512K + 0x0050,
.size   = MTDPART_SIZ_FULL,
},
};

in /uboot/fs/yaffs2/yaffscfg.c  
flashDev-startBlock =44;
flashDev-endBlock = 800;



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Re: [U-Boot] Is it possible to use 1GB or DDR on MPC8360 with e300 core?

2010-06-09 Thread Kim Phillips
On Wed, 9 Jun 2010 17:31:13 +0530
remya pillai remya.pil...@dnsoftsol.com wrote:

 I have an mpc8360e processor (has e300 core and QE) for our networking
 application. I have to use 1GB DRAM module in my board, but u-boot for
 powerpc is not supporting that. It is supporting only 256MB DRAM module.

Apparently DDR is set up manually in the u-boot port of your board -
try defining CONFIG_SPD_EEPROM in your board config, or reconfigure its
static DDR parameters.

Kim
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[U-Boot] [PATCH] USB OHCI support for at91sam9g45 SoC

2010-06-09 Thread Sergey Matyukevich
Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards.

Note that according to errata from Atmel, OHCI is not operational
on the first revision of at91sam9g45 chip. So this patch enables
OHCI support for later revisions.

Signed-off-by: Sergey Matyukevich geoma...@gmail.com
---
 arch/arm/include/asm/arch-at91/at91_pmc.h   |   14 --
 board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c |   13 +
 drivers/usb/host/ohci-at91.c|   13 +
 3 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h 
b/arch/arm/include/asm/arch-at91/at91_pmc.h
index 5b1a85d..2f9ad96 100644
--- a/arch/arm/include/asm/arch-at91/at91_pmc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pmc.h
@@ -35,13 +35,15 @@ typedef struct at91_pmc {
u32 pcer;   /* 0x10 Peripheral Clock Enable Register */
u32 pcdr;   /* 0x14 Peripheral Clock Disable Register */
u32 pcsr;   /* 0x18 Peripheral Clock Status Register */
-   u32 reserved1;
+   u32 uckr;   /* 0x1C UTMI Clock Register */
u32 mor;/* 0x20 Main Oscilator Register */
u32 mcfr;   /* 0x24 Main Clock Frequency Register */
u32 pllar;  /* 0x28 PLL A Register */
u32 pllbr;  /* 0x2C PLL B Register */
u32 mckr;   /* 0x30 Master Clock Register */
-   u32 reserved2[3];
+   u32 reserved1;
+   u32 usb;/* 0x38 USB Clock Register */
+   u32 reserved2;
u32 pck[4]; /* 0x40 Programmable Clock Register 0 - 3 */
u32 reserved3[4];
u32 ier;/* 0x60 Interrupt Enable Register */
@@ -199,6 +201,14 @@ typedef struct at91_pmc {
 #defineAT91_PMC_PDIV_2 (1  12)
 
 #ifdef CONFIG_AT91_LEGACY
+#defineAT91_PMC_USB(AT91_PMC + 0x38)   
/* USB Clock Register */
+#endif
+#defineAT91_PMC_USBS_USB_PLLA  (0x0)   /* USB 
Clock Input is PLLA */
+#defineAT91_PMC_USBS_USB_UPLL  (0x1)   /* USB 
Clock Input is UPLL */
+#defineAT91_PMC_USBDIV_8   (0x7   8) /* USB 
Clock divided by 8 */
+#defineAT91_PMC_USBDIV_10  (0x9   8) /* USB 
Clock divided by 10 */
+
+#ifdef CONFIG_AT91_LEGACY
 #defineAT91_PMC_PCKR(n)(AT91_PMC + 0x40 + ((n) * 4))   /* 
Programmable Clock 0-3 Registers */
 
 #defineAT91_PMC_IER(AT91_PMC + 0x60)   /* Interrupt 
Enable Register */
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c 
b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index edfb627..8fa0449 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -87,6 +87,16 @@ static void at91sam9m10g45ek_nand_hw_init(void)
 }
 #endif
 
+#ifdef CONFIG_CMD_USB
+static void at91sam9m10g45ek_usb_hw_init(void)
+{
+   at91_sys_write(AT91_PMC_PCER, 1  AT91SAM9G45_ID_PIODE);
+
+   at91_set_gpio_output(AT91_PIN_PD1, 0);
+   at91_set_gpio_output(AT91_PIN_PD3, 0);
+}
+#endif
+
 #ifdef CONFIG_MACB
 static void at91sam9m10g45ek_macb_hw_init(void)
 {
@@ -251,6 +261,9 @@ int board_init(void)
 #ifdef CONFIG_CMD_NAND
at91sam9m10g45ek_nand_hw_init();
 #endif
+#ifdef CONFIG_CMD_USB
+   at91sam9m10g45ek_usb_hw_init();
+#endif
 #ifdef CONFIG_HAS_DATAFLASH
at91_spi0_hw_init(1  0);
 #endif
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index b2e03bc..f791df7 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -41,6 +41,14 @@ int usb_cpu_init(void)
writel(get_pllb_init(), pmc-pllbr);
while ((readl(pmc-sr)  AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
+#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+   /* Enable UPLL */
+   writel(readl(pmc-uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN, 
pmc-uckr);
+   while ((readl(pmc-sr)  AT91_PMC_LOCKU) != AT91_PMC_LOCKU)
+   ;
+
+   /* Select PLLA as input clock of OHCI */
+   writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, pmc-usb);
 #endif
 
/* Enable USB host clock. */
@@ -72,6 +80,11 @@ int usb_cpu_stop(void)
writel(0, pmc-pllbr);
while ((readl(pmc-sr)  AT91_PMC_LOCKB) != 0)
;
+#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+   /* Disable UPLL */
+   writel(readl(pmc-uckr)  (~AT91_PMC_UPLLEN), pmc-uckr);
+   while ((readl(pmc-sr)  AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
+   ;
 #endif
 
return 0;
-- 
1.6.2.5

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[U-Boot] [PATCH V7 1/3] Initial support for Marvell Orion5x SoC

2010-06-09 Thread Albert Aribaud
This patch adds support for the Marvell Orion5x SoC.
It has no use alone, and must be followed by a patch
to add Orion5x support for serial, then support for
the ED Mini V2, an Orion5x-based product from LaCie.

Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
Patchset history

V1: Initial monolithic patch.
V2: split in three patches : orion, serial, edmini;
checkpatch'ed, with only 6 errors, in patch 1/3,
all 6 errors being false positives.
V3: useless GPIO and MPP programming support removed;
low level init added/CONFIG_SKIP_LOW_LEVEL_INIT removed.
V4: all files licensed GPLv2-only removed;
RAM bank size detection now uses get_ram_size().
V5: Replaced macros by C structs in dram code.
Removed compilation warnings in dram code.
Added comments to legacy flash definitions.
Split low level init code into SoC- and Chip-specifics.
V6: Set copyright dates to 2010, and put standard GPL notice
mentioning Marvell's copyright on *_lowlevel_init.S files.
V7: Moved GPIO and MPP init code in SoC arch_misc_init() in C.
lowlevel_init.S now only contains DRAM init code.

Patch 1 checkpatched with 0 errors and 1 spurious warning.
Patches 2 and 3 checkpatched with 0 errors and 0 warnings.

 arch/arm/cpu/arm926ejs/orion5x/Makefile|   55 +
 arch/arm/cpu/arm926ejs/orion5x/cpu.c   |  271 ++
 arch/arm/cpu/arm926ejs/orion5x/dram.c  |   64 +
 arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S |  293 
 arch/arm/cpu/arm926ejs/orion5x/timer.c |  181 +++
 arch/arm/include/asm/arch-orion5x/cpu.h|  203 
 arch/arm/include/asm/arch-orion5x/mv88f5182.h  |   40 
 arch/arm/include/asm/arch-orion5x/orion5x.h|   69 ++
 8 files changed, 1176 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/dram.c
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/timer.c
 create mode 100644 arch/arm/include/asm/arch-orion5x/cpu.h
 create mode 100644 arch/arm/include/asm/arch-orion5x/mv88f5182.h
 create mode 100644 arch/arm/include/asm/arch-orion5x/orion5x.h

diff --git a/arch/arm/cpu/arm926ejs/orion5x/Makefile 
b/arch/arm/cpu/arm926ejs/orion5x/Makefile
new file mode 100644
index 000..11f4141
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/orion5x/Makefile
@@ -0,0 +1,55 @@
+#
+# Copyright (C) 2010 Albert ARIBAUD albert.arib...@free.fr
+#
+# Based on original Kirkwood support which is
+# (C) Copyright 2009
+# Marvell Semiconductor www.marvell.com
+# Written-by: Prafulla Wadaskar prafu...@marvell.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).a
+
+COBJS-y= cpu.o
+COBJS-y+= dram.o
+COBJS-y+= timer.o
+
+ifndef CONFIG_SKIP_LOWLEVEL_INIT
+SOBJS  := lowlevel_init.o
+endif
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c 
b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
new file mode 100644
index 000..807174a
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
@@ -0,0 +1,271 @@
+/*
+ * Copyright (C) 2010 Albert ARIBAUD albert.arib...@free.fr
+ *
+ * Based on original Kirkwood support which is
+ * (C) Copyright 2009
+ * Marvell Semiconductor www.marvell.com
+ * Written-by: Prafulla Wadaskar prafu...@marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later 

[U-Boot] [PATCH V7 1/3] Initial support for Marvell Orion5x SoC

2010-06-09 Thread Albert Aribaud
This patch adds support for the Marvell Orion5x SoC.
It has no use alone, and must be followed by a patch
to add Orion5x support for serial, then support for
the ED Mini V2, an Orion5x-based product from LaCie.

Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
Patchset history

V1: Initial monolithic patch.
V2: split in three patches : orion, serial, edmini;
checkpatch'ed, with only 6 errors, in patch 1/3,
all 6 errors being false positives.
V3: useless GPIO and MPP programming support removed;
low level init added/CONFIG_SKIP_LOW_LEVEL_INIT removed.
V4: all files licensed GPLv2-only removed;
RAM bank size detection now uses get_ram_size().
V5: Replaced macros by C structs in dram code.
Removed compilation warnings in dram code.
Added comments to legacy flash definitions.
Split low level init code into SoC- and Chip-specifics.
V6: Set copyright dates to 2010, and put standard GPL notice
mentioning Marvell's copyright on *_lowlevel_init.S files.
V7: Moved GPIO and MPP init code in SoC arch_misc_init() in C.
lowlevel_init.S now only contains DRAM init code.

Patch 1 checkpatched with 0 errors and 1 spurious warning.
Patches 2 and 3 checkpatched with 0 errors and 0 warnings.

 arch/arm/cpu/arm926ejs/orion5x/Makefile|   55 +
 arch/arm/cpu/arm926ejs/orion5x/cpu.c   |  271 ++
 arch/arm/cpu/arm926ejs/orion5x/dram.c  |   64 +
 arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S |  293 
 arch/arm/cpu/arm926ejs/orion5x/timer.c |  181 +++
 arch/arm/include/asm/arch-orion5x/cpu.h|  203 
 arch/arm/include/asm/arch-orion5x/mv88f5182.h  |   40 
 arch/arm/include/asm/arch-orion5x/orion5x.h|   69 ++
 8 files changed, 1176 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/dram.c
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
 create mode 100644 arch/arm/cpu/arm926ejs/orion5x/timer.c
 create mode 100644 arch/arm/include/asm/arch-orion5x/cpu.h
 create mode 100644 arch/arm/include/asm/arch-orion5x/mv88f5182.h
 create mode 100644 arch/arm/include/asm/arch-orion5x/orion5x.h

diff --git a/arch/arm/cpu/arm926ejs/orion5x/Makefile 
b/arch/arm/cpu/arm926ejs/orion5x/Makefile
new file mode 100644
index 000..11f4141
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/orion5x/Makefile
@@ -0,0 +1,55 @@
+#
+# Copyright (C) 2010 Albert ARIBAUD albert.arib...@free.fr
+#
+# Based on original Kirkwood support which is
+# (C) Copyright 2009
+# Marvell Semiconductor www.marvell.com
+# Written-by: Prafulla Wadaskar prafu...@marvell.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).a
+
+COBJS-y= cpu.o
+COBJS-y+= dram.o
+COBJS-y+= timer.o
+
+ifndef CONFIG_SKIP_LOWLEVEL_INIT
+SOBJS  := lowlevel_init.o
+endif
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c 
b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
new file mode 100644
index 000..807174a
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
@@ -0,0 +1,271 @@
+/*
+ * Copyright (C) 2010 Albert ARIBAUD albert.arib...@free.fr
+ *
+ * Based on original Kirkwood support which is
+ * (C) Copyright 2009
+ * Marvell Semiconductor www.marvell.com
+ * Written-by: Prafulla Wadaskar prafu...@marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later 

[U-Boot] [PATCH V7 2/3] Add Orion5x support to 16550 device driver

2010-06-09 Thread Albert Aribaud
This patch provides access to the 16550-compatible
serial device of the Orion5x SoC.

Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
 drivers/serial/serial.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 8eda95c..1073ac0 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -30,6 +30,9 @@
 #ifdef CONFIG_KIRKWOOD
 #include asm/arch/kirkwood.h
 #endif
+#ifdef CONFIG_ORION5X
+#include asm/arch/orion5x.h
+#endif
 
 #if defined (CONFIG_SERIAL_MULTI)
 #include serial.h
-- 
1.6.4.4

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[U-Boot] [PATCH V7 2/3] Add Orion5x support to 16550 device driver

2010-06-09 Thread Albert Aribaud
This patch provides access to the 16550-compatible
serial device of the Orion5x SoC.

Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
 drivers/serial/serial.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 8eda95c..1073ac0 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -30,6 +30,9 @@
 #ifdef CONFIG_KIRKWOOD
 #include asm/arch/kirkwood.h
 #endif
+#ifdef CONFIG_ORION5X
+#include asm/arch/orion5x.h
+#endif
 
 #if defined (CONFIG_SERIAL_MULTI)
 #include serial.h
-- 
1.6.4.4

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[U-Boot] [PATCH V7 3/3] Add support for the LaCie ED Mini V2 board

2010-06-09 Thread Albert Aribaud
This patch adds support for the LaCie ED Mini V2 product
which is based on the Marvell Orion5x SoC.

Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
 MAINTAINERS |4 +
 MAKEALL |1 +
 Makefile|3 +
 board/LaCie/edminiv2/Makefile   |   53 
 board/LaCie/edminiv2/config.mk  |   27 ++
 board/LaCie/edminiv2/edminiv2.c |   92 +
 include/configs/edminiv2.h  |  172 +++
 7 files changed, 352 insertions(+), 0 deletions(-)
 create mode 100644 board/LaCie/edminiv2/Makefile
 create mode 100644 board/LaCie/edminiv2/config.mk
 create mode 100644 board/LaCie/edminiv2/edminiv2.c
 create mode 100644 include/configs/edminiv2.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 7a13d28..f6d6f41 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -525,6 +525,10 @@ Unknown / orphaned boards:
 #  Board   CPU #
 #
 
+Albert ARIBAUD albert.arib...@free.fr
+
+   edminiv2ARM926EJS (Orion5x SoC)
+
 Rowel Atienza ro...@diwalabs.com
 
armadillo   ARM720T
diff --git a/MAKEALL b/MAKEALL
index 2527352..7689ed2 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -569,6 +569,7 @@ LIST_ARM9= \
edb9312 \
edb9315 \
edb9315a\
+   edminiv2\
guruplug\
imx27lite   \
lpd7a400\
diff --git a/Makefile b/Makefile
index c26e491..cebd2de 100644
--- a/Makefile
+++ b/Makefile
@@ -2943,6 +2943,9 @@ davinci_dm365evm_config : unconfig
 davinci_dm6467evm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
 
+edminiv2_config: unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) LaCie orion5x
+
 guruplug_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
 
diff --git a/board/LaCie/edminiv2/Makefile b/board/LaCie/edminiv2/Makefile
new file mode 100644
index 000..df542dc
--- /dev/null
+++ b/board/LaCie/edminiv2/Makefile
@@ -0,0 +1,53 @@
+#
+# Copyright (C) 2010 Albert ARIBAUD albert.arib...@free.fr
+#
+# Based on original Kirkwood support which is
+# (C) Copyright 2009
+# Marvell Semiconductor www.marvell.com
+# Written-by: Prafulla Wadaskar prafu...@marvell.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := edminiv2.o
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+   rm -f $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/LaCie/edminiv2/config.mk b/board/LaCie/edminiv2/config.mk
new file mode 100644
index 000..3dec1aa
--- /dev/null
+++ b/board/LaCie/edminiv2/config.mk
@@ -0,0 +1,27 @@
+#
+# Copyright (C) 2010 Albert ARIBAUD albert.arib...@free.fr
+#
+# (C) Copyright 2009
+# Marvell Semiconductor www.marvell.com
+# Written-by: Prafulla Wadaskar prafu...@marvell.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 

Re: [U-Boot] [PATCH V7 2/3] Add Orion5x support to 16550 device driver

2010-06-09 Thread Albert ARIBAUD
Le 09/06/2010 22:50, Albert Aribaud a écrit :


Apologies for the duplicate 1/3 and 2/3 patches.

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH 1/4] Atmel Dataflash: convert to C struct accessors

2010-06-09 Thread Mike Frysinger
On Wednesday, June 09, 2010 03:06:26 Thomas Petazzoni wrote:
 On Tue, 8 Jun 2010 15:20:57 -0400 Mike Frysinger wrote:
  speaking historically, the dataflash code absolutely has its place.
  it existed long before the SPI flash framework.  but i'm looking
  forward only now.
 
 Yes, of course, understood.
 
 However, the Dataflash aren't normal SPI flash, they don't have the
 same opcodes. For example, drivers/mtd/spi/spi_flash.c assumes that it
 can probe the ID code of the SPI flash by sending the CMD_READ_ID
 (0x9F) command (in spi_flash_probe()). This works for SPI flashes, but
 not for Dataflashes. The identification of Dataflashes takes place with
 command GET_STATUS (0xD7) in drivers/mtd/at45.c, which has a different
 return value than the 0x9F command of SPI flashes. Am I missing
 something ?

i see drivers/mtd/spi/atmel.c with all the same IDs as drivers/mtd/dataflash.c 
so presumably it works.  i also vaguely recall having tested one or two myself 
with the SPI flash subsystem.

according to the datasheet for the AT45DB642D, 0x9F is the get the ID code 
while 0xDF is the get flash status.  i dont see how you can get the flash id 
info out of the flash status register.  perhaps you're confusing the code 
bases ?
-mike


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Re: [U-Boot] [PATCH 2/4 v2] musb: Add Phy programming for using external Vbus

2010-06-09 Thread Mike Frysinger
On Wednesday, June 09, 2010 06:45:32 Ajay Kumar Gupta wrote:
 +static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
 +{}

probably want this to return 0 to avoid warnings, otherwise this looks good to 
me.  thanks !
-mike


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[U-Boot] [PATCH] net: warn about spaces in device names

2010-06-09 Thread Mike Frysinger
Some commands operate on eth device names (like 'mii'), but those cannot
be passed on the command line as one argument.  So detect devices like
these and warn about them so someone will fix it.

Signed-off-by: Mike Frysinger vap...@gentoo.org
---
 net/eth.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/net/eth.c b/net/eth.c
index b650a20..40e66e5 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -225,6 +225,9 @@ int eth_initialize(bd_t *bis)
puts ( [PRIME]);
}
 
+   if (strchr(dev-name, ' '))
+   puts(\nWarning: eth device name has a 
space!\n);
+
eth_getenv_enetaddr_by_index(eth_number, env_enetaddr);
 
if (memcmp(env_enetaddr, \0\0\0\0\0\0, 6)) {
-- 
1.7.1

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[U-Boot] [PATCH] uli526x: drop newlines from device name

2010-06-09 Thread Mike Frysinger
Device names should not contain non-printable characters like newlines.

Signed-off-by: Mike Frysinger vap...@gentoo.org
---
 drivers/net/uli526x.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/uli526x.c b/drivers/net/uli526x.c
index 9477851..56eee7b 100644
--- a/drivers/net/uli526x.c
+++ b/drivers/net/uli526x.c
@@ -225,7 +225,7 @@ int uli526x_initialize(bd_t *bis)
iobase = ~0xf;
 
dev = (struct eth_device *)malloc(sizeof *dev);
-   sprintf(dev-name, uli526x#%d\n, card_number);
+   sprintf(dev-name, uli526x#%d, card_number);
db = (struct uli526x_board_info *)
malloc(sizeof(struct uli526x_board_info));
 
-- 
1.7.1

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[U-Boot] [PATCH] ppc/8xxx: Add is_core_disabled to remove disabled cores from dtb

2010-06-09 Thread Kumar Gala
If we explicitly disabled a core remove it from the dtb we pass on to
the kernel.

Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/cpu/mpc85xx/mp.c  |   25 +
 arch/powerpc/cpu/mpc86xx/mp.c  |   19 +++
 arch/powerpc/cpu/mpc8xxx/fdt.c |3 ++-
 arch/powerpc/include/asm/mp.h  |3 ++-
 4 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 826bf32..0d39f3b 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -77,6 +77,13 @@ int cpu_disable(int nr)
 
return 0;
 }
+
+int is_core_disabled(int nr) {
+   volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+   u32 coredisrl = in_be32(gur-coredisrl);
+
+   return (coredisrl  (1  nr));
+}
 #else
 int cpu_disable(int nr)
 {
@@ -96,6 +103,24 @@ int cpu_disable(int nr)
 
return 0;
 }
+
+int is_core_disabled(int nr) {
+   volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+   u32 devdisr = in_be32(gur-devdisr);
+
+   switch (nr) {
+   case 0:
+   return (devdisr  MPC85xx_DEVDISR_CPU0);
+   break;
+   case 1:
+   return (devdisr  MPC85xx_DEVDISR_CPU1);
+   break;
+   default:
+   printf(Invalid cpu number for disable %d\n, nr);
+   }
+
+   return 0;
+}
 #endif
 
 static u8 boot_entry_map[4] = {
diff --git a/arch/powerpc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c
index b4a0faa..97e4692 100644
--- a/arch/powerpc/cpu/mpc86xx/mp.c
+++ b/arch/powerpc/cpu/mpc86xx/mp.c
@@ -66,6 +66,25 @@ int cpu_disable(int nr)
return 0;
 }
 
+int is_core_disabled(int nr) {
+   volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
+   volatile ccsr_gur_t *gur = immap-im_gur;
+   u32 devdisr = in_be32(gur-devdisr);
+
+   switch (nr) {
+   case 0:
+   return (devdisr  MPC86xx_DEVDISR_CPU0);
+   break;
+   case 1:
+   return (devdisr  MPC86xx_DEVDISR_CPU1);
+   break;
+   default:
+   printf(Invalid cpu number for disable %d\n, nr);
+   }
+
+   return 0;
+}
+
 int cpu_release(int nr, int argc, char *argv[])
 {
/* dummy function so common/cmd_mp.c will build
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index c9956b6..02bdb70 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -26,6 +26,7 @@
 #include common.h
 #include libfdt.h
 #include fdt_support.h
+#include asm/mp.h
 
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 static int ft_del_cpuhandle(void *blob, int cpuhandle)
@@ -57,7 +58,7 @@ void ft_fixup_num_cores(void *blob) {
while (off != -FDT_ERR_NOTFOUND) {
u32 *reg = (u32 *)fdt_getprop(blob, off, reg, 0);
 
-   if (*reg  num_cores-1) {
+   if ((*reg  num_cores-1) || (is_core_disabled(*reg))) {
int ph = fdt_get_phandle(blob, off);
 
/* Delete the cpu node once there are no cpu handles */
diff --git a/arch/powerpc/include/asm/mp.h b/arch/powerpc/include/asm/mp.h
index 5388c95..3ffa30b 100644
--- a/arch/powerpc/include/asm/mp.h
+++ b/arch/powerpc/include/asm/mp.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -26,5 +26,6 @@
 void setup_mp(void);
 void cpu_mp_lmb_reserve(struct lmb *lmb);
 u32 determine_mp_bootpg(void);
+int is_core_disabled(int nr);
 
 #endif
-- 
1.6.0.6

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Re: [U-Boot] [PATCH] ppc/8xxx: Add is_core_disabled to remove disabled cores from dtb

2010-06-09 Thread Timur Tabi
On Wed, Jun 9, 2010 at 10:34 PM, Kumar Gala ga...@kernel.crashing.org wrote:

 +int is_core_disabled(int nr) {
 +       volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 +       u32 coredisrl = in_be32(gur-coredisrl);

You don't need to declare the variable as volatile if you use an I/O accessor.

 +int is_core_disabled(int nr) {
 +       volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 +       u32 devdisr = in_be32(gur-devdisr);

Same thing here.

 +
 +       switch (nr) {
 +       case 0:
 +               return (devdisr  MPC85xx_DEVDISR_CPU0);
 +               break;
 +       case 1:
 +               return (devdisr  MPC85xx_DEVDISR_CPU1);
 +               break;

And you don't need a 'break' after a 'return' in a switch-case
statement.  You also don't need parentheses around the expression in
the 'return' statement.

-- 
Timur Tabi
Linux kernel developer at Freescale
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Re: [U-Boot] [PATCH] ppc/8xxx: Add is_core_disabled to remove disabled cores from dtb

2010-06-09 Thread Kumar Gala

On Jun 9, 2010, at 10:40 PM, Timur Tabi wrote:

 On Wed, Jun 9, 2010 at 10:34 PM, Kumar Gala ga...@kernel.crashing.org wrote:
 
 +int is_core_disabled(int nr) {
 +   volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 +   u32 coredisrl = in_be32(gur-coredisrl);
 
 You don't need to declare the variable as volatile if you use an I/O accessor.
 
 +int is_core_disabled(int nr) {
 +   volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 +   u32 devdisr = in_be32(gur-devdisr);
 
 Same thing here.

will fix.

 +
 +   switch (nr) {
 +   case 0:
 +   return (devdisr  MPC85xx_DEVDISR_CPU0);
 +   break;
 +   case 1:
 +   return (devdisr  MPC85xx_DEVDISR_CPU1);
 +   break;
 
 And you don't need a 'break' after a 'return' in a switch-case
 statement.  You also don't need parentheses around the expression in
 the 'return' statement.

Going to leave the parens for readability, will drop the break's.

- k
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[U-Boot] [PATCH 1/2] powerpc/85xx: Add command to report errata workarounds

2010-06-09 Thread Kumar Gala
Add 'errata' command to report what errata we workaround

Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/cpu/mpc85xx/Makefile |1 +
 arch/powerpc/cpu/mpc85xx/cmd_errata.c |   35 +
 2 files changed, 36 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/cpu/mpc85xx/cmd_errata.c

diff --git a/arch/powerpc/cpu/mpc85xx/Makefile 
b/arch/powerpc/cpu/mpc85xx/Makefile
index f064fee..e3746e6 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -32,6 +32,7 @@ START = start.o resetvec.o
 SOBJS-$(CONFIG_MP) += release.o
 SOBJS  = $(SOBJS-y)
 
+COBJS-$(CONFIG_CMD_ERRATA) += cmd_errata.o
 COBJS-$(CONFIG_CPM2)   += commproc.o
 
 # supports ddr1
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c 
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
new file mode 100644
index 000..6824ebf
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include command.h
+
+static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+   return 0;
+}
+
+U_BOOT_CMD(
+   errata, 1, 0,   do_errata,
+   Report errata workarounds,
+   
+);
-- 
1.6.0.6

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[U-Boot] [PATCH 2/2] powerpc/85xx: Report workaround of errata SATA-A001

2010-06-09 Thread Kumar Gala
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/cpu/mpc85xx/cmd_errata.c |   14 ++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c 
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 6824ebf..81078bd 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -22,9 +22,23 @@
 
 #include common.h
 #include command.h
+#include linux/compiler.h
+#include asm/processor.h
 
 static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
+   __maybe_unused u32 svr = get_svr();
+
+#if defined(CONFIG_FSL_SATA_V2)  defined(CONFIG_FSL_SATA_ERRATUM_A001)
+   if (IS_SVR_REV(svr, 1, 0) 
+   ((SVR_SOC_VER(svr) == SVR_P1022) ||
+(SVR_SOC_VER(svr) == SVR_P1022_E) ||
+(SVR_SOC_VER(svr) == SVR_P1013) ||
+(SVR_SOC_VER(svr) == SVR_P1013_E))) {
+   puts(Work-around for Erratum SATA A001 enabled\n);
+   }
+#endif
+
return 0;
 }
 
-- 
1.6.0.6

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[U-Boot] [PATCH] powerpc/8xxx: Distinguish between incompatible SEC h/w types

2010-06-09 Thread Kumar Gala
From: Kim Phillips kim.phill...@freescale.com

CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomodate incompatible code changes.

Signed-off-by: Kim Phillips kim.phill...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/cpu/mpc8xxx/fdt.c|6 +++---
 arch/powerpc/include/asm/config.h |7 +++
 include/fdt_support.h |2 +-
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 79d3cdf..d0e06e2 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -97,11 +97,11 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
 }
 #endif /* CONFIG_HAS_FSL_DR_USB */
 
-#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx)
 /*
  * update crypto node properties to a specified revision of the SEC
- * called with sec_rev == 0 if not on an mpc8xxxE processor
+ * called with sec_rev == 0 if not on an E processor
  */
+#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
 void fdt_fixup_crypto_node(void *blob, int sec_rev)
 {
const struct sec_rev_prop {
@@ -183,4 +183,4 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev)
printf(WARNING: could not set crypto property: %s\n,
   fdt_strerror(err));
 }
-#endif /* defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) */
+#endif
diff --git a/arch/powerpc/include/asm/config.h 
b/arch/powerpc/include/asm/config.h
index fc3facb..1c61784 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -66,6 +66,13 @@
 #define CONFIG_TSECV2
 #endif
 
+/*
+ * SEC (crypto unit) major compatible version determination
+ */
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx)
+#define CONFIG_SYS_FSL_SEC_COMPAT  2
+#endif
+
 /* Number of TLB CAM entries we have on FSL Book-E chips */
 #if defined(CONFIG_E500MC)
 #define CONFIG_SYS_NUM_TLBCAMS 64
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 9a453af..fc16159 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -59,7 +59,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd);
 static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
 #endif /* CONFIG_HAS_FSL_DR_USB */
 
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx)
+#if defined(CONFIG_SYS_FSL_SEC_COMPAT)
 void fdt_fixup_crypto_node(void *blob, int sec_rev);
 #else
 static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
-- 
1.6.0.6

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[U-Boot] [PATCH] powerpc/8xxx: Add base support for the SEC4

2010-06-09 Thread Kumar Gala
From: Kim Phillips kim.phill...@freescale.com

Signed-off-by: Kim Phillips kim.phill...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/cpu/mpc8xxx/fdt.c|6 +
 arch/powerpc/include/asm/config.h |4 ++-
 arch/powerpc/include/asm/immap_85xx.h |   38 +
 3 files changed, 47 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index d0e06e2..738394f 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -183,4 +183,10 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev)
printf(WARNING: could not set crypto property: %s\n,
   fdt_strerror(err));
 }
+#elif CONFIG_SYS_FSL_SEC_COMPAT = 4  /* SEC4 */
+void fdt_fixup_crypto_node(void *blob, int sec_rev)
+{
+   if (!sec_rev)
+   fdt_del_node_and_alias(blob, crypto);
+}
 #endif
diff --git a/arch/powerpc/include/asm/config.h 
b/arch/powerpc/include/asm/config.h
index 1c61784..75e19a5 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -69,7 +69,9 @@
 /*
  * SEC (crypto unit) major compatible version determination
  */
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx)
+#if defined(CONFIG_FSL_CORENET)
+#define CONFIG_SYS_FSL_SEC_COMPAT  4
+#elif defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx)
 #define CONFIG_SYS_FSL_SEC_COMPAT  2
 #endif
 
diff --git a/arch/powerpc/include/asm/immap_85xx.h 
b/arch/powerpc/include/asm/immap_85xx.h
index 74236a2..8b773be 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2073,6 +2073,41 @@ enum {
FSL_SRDS_B3_LANE_D = 23,
 };
 
+/* Security Engine Block (MS = Most Sig., LS = Least Sig.) */
+#if CONFIG_SYS_FSL_SEC_COMPAT = 4
+typedef struct ccsr_sec {
+   u8  res1[0xfa0];
+   u32 crnr_ms;/* CHA Revision Number Register, MS */
+   u32 crnr_ls;/* CHA Revision Number Register, LS */
+   u32 ctpr_ms;/* Compile Time Parameters Register, MS */
+#define SEC_CTPR_MS_AXI_LIODN  0x0800
+#define SEC_CTPR_MS_QI 0x0200
+   u32 ctpr_ls;/* Compile Time Parameters Register, LS */
+   u8  res2[0x10];
+   u32 far_ms; /* Fault Address Register, MS */
+   u32 far_ls; /* Fault Address Register, LS */
+   u32 falr;   /* Fault Address LIODN Register */
+   u32 fadr;   /* Fault Address Detail Register */
+   u8  res3[0x4];
+   u32 csta;   /* CAAM Status Register */
+   u8  res4[0x8];
+   u32 rvid;   /* Run Time Integrity Checking Version ID Reg.*/
+#define SEC_RVID_MA0x0f00
+   u32 ccbvid; /* CHA Cluster Block Version ID Register */
+   u32 chavid_ms;  /* CHA Version ID Register, MS */
+   u32 chavid_ls;  /* CHA Version ID Register, LS */
+   u32 chanum_ms;  /* CHA Number Register, MS */
+#define SEC_CHANUM_MS_JQNUM_MASK   0xf000
+#define SEC_CHANUM_MS_JQNUM_SHIFT  28
+#define SEC_CHANUM_MS_DECONUM_MASK 0x0f00
+#define SEC_CHANUM_MS_DECONUM_SHIFT24
+   u32 chanum_ls;  /* CHA Number Register, LS */
+   u32 caamvid_ms; /* CAAM Version ID Register, MS */
+   u32 caamvid_ls; /* CAAM Version ID Register, LS */
+   u8  res5[0xf000];
+} ccsr_sec_t;
+#endif
+
 #ifdef CONFIG_FSL_CORENET
 #define CONFIG_SYS_FSL_CORENET_CCM_OFFSET  0x
 #define CONFIG_SYS_MPC85xx_DDR_OFFSET  0x8000
@@ -2089,6 +2124,7 @@ enum {
 #define CONFIG_SYS_MPC85xx_USB_OFFSET  0x21
 #define CONFIG_SYS_MPC85xx_SATA1_OFFSET0x22
 #define CONFIG_SYS_MPC85xx_SATA2_OFFSET0x221000
+#define CONFIG_SYS_FSL_SEC_OFFSET  0x30
 #define CONFIG_SYS_FSL_CORENET_QMAN_OFFSET 0x318000
 #define CONFIG_SYS_FSL_CORENET_BMAN_OFFSET 0x31a000
 #define CONFIG_SYS_FSL_FM1_OFFSET  0x40
@@ -2181,6 +2217,8 @@ enum {
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET)
 #define CONFIG_SYS_FSL_FM2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM2_OFFSET)
+#define CONFIG_SYS_FSL_SEC_ADDR \
+   (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
 
 #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
 #define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
-- 
1.6.0.6

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Re: [U-Boot] [PATCH 2/4 v2] musb: Add Phy programming for using external Vbus

2010-06-09 Thread Gupta, Ajay Kumar
  +static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
  +{}
 
 probably want this to return 0 to avoid warnings, otherwise this looks
 good to
 me.  thanks !
Sure, I will update and repost the patches.

Thanks,
Ajay
 -mike
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[U-Boot] [PATCH 3/4 v3] omap3evm: Add board revision function

2010-06-09 Thread Ajay Kumar Gupta
Added function to differentiate between the OMAP3EVM revisions. The
chip-id of the ethernet PHY is being used for this purpose.

Rev A to D : 0x0115
Rev = E   : 0x9220

CC: Remy Bohmer li...@bohmer.net
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Sanjeev Premi pr...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
No change from v2.

 board/ti/evm/evm.c |   30 ++
 board/ti/evm/evm.h |   14 ++
 2 files changed, 44 insertions(+), 0 deletions(-)

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index 0718a08..fcc1803 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -37,6 +37,33 @@
 #include asm/mach-types.h
 #include evm.h
 
+static u8 omap3_evm_version;
+
+u8 get_omap3_evm_rev(void)
+{
+   return omap3_evm_version;
+}
+
+static void omap3_evm_get_revision(void)
+{
+   unsigned int smsc_id;
+
+   /* Ethernet PHY ID is stored at ID_REV register */
+   smsc_id = readl(CONFIG_SMC911X_BASE + 0x50)  0x;
+   printf(Read back SMSC id 0x%x\n, smsc_id);
+
+   switch (smsc_id) {
+   /* SMSC9115 chipset */
+   case 0x0115:
+   omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
+   break;
+   /* SMSC 9220 chipset */
+   case 0x9220:
+   default:
+   omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
+   }
+}
+
 /*
  * Routine: board_init
  * Description: Early hardware init.
@@ -121,6 +148,9 @@ static void setup_net_chip(void)
writel(GPIO0, gpio3_base-cleardataout);
udelay(1);
writel(GPIO0, gpio3_base-setdataout);
+
+   /* determine omap3evm revision */
+   omap3_evm_get_revision();
 }
 
 int board_eth_init(bd_t *bis)
diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h
index 37da29d..e2581f6 100644
--- a/board/ti/evm/evm.h
+++ b/board/ti/evm/evm.h
@@ -33,6 +33,20 @@ const omap3_sysinfo sysinfo = {
 #endif
 };
 
+/*
+ * OMAP35x EVM revision
+ * Run time detection of EVM revision is done by reading Ethernet
+ * PHY ID -
+ *  GEN_1   = 0x0115
+ *  GEN_2   = 0x9220
+ */
+enum {
+   OMAP3EVM_BOARD_GEN_1 = 0,   /* EVM Rev between  A - D */
+   OMAP3EVM_BOARD_GEN_2,   /* EVM Rev = Rev E */
+};
+
+u8 get_omap3_evm_rev(void);
+
 static void setup_net_chip(void);
 
 /*
-- 
1.6.2.4

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[U-Boot] [PATCH 2/4 v3] musb: Add Phy programming for using external Vbus

2010-06-09 Thread Ajay Kumar Gupta
MUSB PHY on OMAP3EVM Rev = E uses external Vbus supply to support
500mA of power.We need to program MUSB PHY to use external Vbus
for this purpose.

Adding 'extvbus' member in musb_config structure which should be set
by all the boards where MUSB interface is using external Vbus supply.

Also added ULPI bus control register read/write abstraction for
Blackfin processor as it doesn't have ULPI registers.

CC: Remy Bohmer li...@bohmer.net
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
Changes from v2:
Added 'return 0' in Blackfin version if ulpi read function.

 drivers/usb/musb/musb_core.c |7 +++
 drivers/usb/musb/musb_core.h |   30 +-
 2 files changed, 36 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 7766069..dc740cf 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -34,6 +34,7 @@ void musb_start(void)
 {
 #if defined(CONFIG_MUSB_HCD)
u8 devctl;
+   u8 busctl;
 #endif
 
/* disable all interrupts */
@@ -45,6 +46,12 @@ void musb_start(void)
/* put into basic highspeed mode and start session */
writeb(MUSB_POWER_HSENAB, musbr-power);
 #if defined(CONFIG_MUSB_HCD)
+   /* Program PHY to use EXT VBUS if required */
+   if (musb_cfg.extvbus == 1) {
+   busctl = musb_read_ulpi_buscontrol(musbr);
+   musb_write_ulpi_buscontrol(musbr, busctl | ULPI_USE_EXTVBUS);
+   }
+
devctl = readb(musbr-devctl);
writeb(devctl | MUSB_DEVCTL_SESSION, musbr-devctl);
 #endif
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 9a1fb4f..4771876 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -112,7 +112,10 @@ struct musb_regs {
u16 rxfifoadd;
u32 vcontrol;
u16 hwvers;
-   u16 reserved2[5];
+   u16 reserved2a[1];
+   u8  ulpi_busctl;
+   u8  reserved2b[1];
+   u16 reserved2[3];
u8  epinfo;
u8  raminfo;
u8  linkinfo;
@@ -181,6 +184,10 @@ struct musb_regs {
 #define MUSB_DEVCTL_HR 0x02
 #define MUSB_DEVCTL_SESSION0x01
 
+/* ULPI VBUSCONTROL */
+#define ULPI_USE_EXTVBUS   0x01
+#define ULPI_USE_EXTVBUSIND0x02
+
 /* TESTMODE */
 #define MUSB_TEST_FORCE_HOST   0x80
 #define MUSB_TEST_FIFO_ACCESS  0x40
@@ -341,6 +348,7 @@ struct musb_config {
struct  musb_regs   *regs;
u32 timeout;
u8  musb_speed;
+   u8  extvbus;
 };
 
 /* externally defined data */
@@ -361,6 +369,26 @@ extern void read_fifo(u8 ep, u32 length, void *fifo_data);
 # define readb(addr) (u8)bfin_read16(addr)
 # undef  writeb
 # define writeb(b, addr) bfin_write16(addr, b)
+/*
+ * The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY.
+ * However, it has no ULPI support - so there are no registers at all.
+ * That means accesses to ULPI_BUSCONTROL have to be abstracted away.
+ */
+static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
+{
+   return 0;
+}
+static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
+{}
+#else
+static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
+{
+   return readb(musbr-ulpi_busctl);
+}
+static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
+{
+   writeb(val, musbr-ulpi_busctl);
+}
 #endif
 
 #endif /* __MUSB_HDRC_DEFS_H__ */
-- 
1.6.2.4

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[U-Boot] [PATCH 4/4 v3] musb: Program extvbus for OMAP3EVM Rev = E

2010-06-09 Thread Ajay Kumar Gupta
OMAP3EVM Rev =E uses external Vbus supply so setting 'extvbus'
to '1' for OMAP3EVM Rev =E runtime based on EVM revision.

CC: Remy Bohmer li...@bohmer.net
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
No change from v2.

 board/ti/evm/evm.c   |   13 +
 drivers/usb/musb/omap3.c |3 +++
 drivers/usb/musb/omap3.h |4 
 3 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index fcc1803..9948b9c 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -65,6 +65,19 @@ static void omap3_evm_get_revision(void)
 }
 
 /*
+ * MUSB port on OMAP3EVM Rev = E requires extvbus programming.
+ */
+u8 omap3_evm_need_extvbus(void)
+{
+   u8 retval = 0;
+
+   if (get_omap3_evm_rev() = OMAP3EVM_BOARD_GEN_2)
+   retval = 1;
+
+   return retval;
+}
+
+/*
  * Routine: board_init
  * Description: Early hardware init.
  */
diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
index 785629c..a983552 100644
--- a/drivers/usb/musb/omap3.c
+++ b/drivers/usb/musb/omap3.c
@@ -119,6 +119,9 @@ int musb_platform_init(void)
stdby = ~OMAP3_OTG_FORCESTDBY_STANDBY;
writel(stdby, otg-forcestdby);
 
+#ifdef CONFIG_OMAP3_EVM
+   musb_cfg.extvbus = omap3_evm_need_extvbus();
+#endif
platform_needs_initialization = 0;
}
 
diff --git a/drivers/usb/musb/omap3.h b/drivers/usb/musb/omap3.h
index b591862..c934e0c 100644
--- a/drivers/usb/musb/omap3.h
+++ b/drivers/usb/musb/omap3.h
@@ -44,4 +44,8 @@
 
 int musb_platform_init(void);
 
+#ifdef CONFIG_OMAP3_EVM
+extern u8 omap3_evm_use_extvbus(void);
+#endif
+
 #endif /* _MUSB_OMAP3_H */
-- 
1.6.2.4

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[U-Boot] [PATCH 1/4 v3] musb: Use name based initialization for musb_config

2010-06-09 Thread Ajay Kumar Gupta
Changed musb_config initialization for omap3.c, davinci.c
and da8xx.c using name of structure fields. This would cause
the uninitialized field to be null by default and thus would
help in avoiding to init some flags required to be set only
for a few selected platforms.

CC: Remy Bohmer li...@bohmer.net
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
No change from v2.

 drivers/usb/musb/da8xx.c   |6 +++---
 drivers/usb/musb/davinci.c |6 +++---
 drivers/usb/musb/omap3.c   |6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
index 40bfe44..617d88e 100644
--- a/drivers/usb/musb/da8xx.c
+++ b/drivers/usb/musb/da8xx.c
@@ -27,9 +27,9 @@
 
 /* MUSB platform configuration */
 struct musb_config musb_cfg = {
-   (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
-   DA8XX_USB_OTG_TIMEOUT,
-   0
+   .regs   = (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
+   .timeout= DA8XX_USB_OTG_TIMEOUT,
+   .musb_speed = 0,
 };
 
 /*
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index 8fbadc9..f56f2df 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -28,9 +28,9 @@
 
 /* MUSB platform configuration */
 struct musb_config musb_cfg = {
-   (struct musb_regs *)MENTOR_USB0_BASE,
-   DAVINCI_USB_TIMEOUT,
-   0
+   .regs   = (struct musb_regs *)MENTOR_USB0_BASE,
+   .timeout= DAVINCI_USB_TIMEOUT,
+   .musb_speed = 0,
 };
 
 /* MUSB module register overlay */
diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
index 3bfd0a0..785629c 100644
--- a/drivers/usb/musb/omap3.c
+++ b/drivers/usb/musb/omap3.c
@@ -36,9 +36,9 @@
 static int platform_needs_initialization = 1;
 
 struct musb_config musb_cfg = {
-   (struct musb_regs *)MENTOR_USB0_BASE,
-   OMAP3_USB_TIMEOUT,
-   0
+   .regs   = (struct musb_regs *)MENTOR_USB0_BASE,
+   .timeout= OMAP3_USB_TIMEOUT,
+   .musb_speed = 0,
 };
 
 /*
-- 
1.6.2.4

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