Re: [casper] Roach1 not working
On Wed, Apr 29, 2015 at 10:49 PM, Nishanth Shivashankaran nshiv...@asu.edu wrote: Hi All, We bought a new desktop and I tried installing nfs boot on to the new computer to boot the roach1 and was trying to bring the roach1 up. But I think I messed up installing something somewhere and the roach 1 is not returning anything to the minicom terminal at all. I am sure it is connected to the right port because I can see it on the terminal using dmesg command. If you can see serial text output, then chances are very good that your bootloader is still working. Have you tried pressing any key during bootup, to see if you can reach the bootloader prompt - if you can type printenv then uboot is still functional, and there is no need to resort to jtag regards marc
[casper] Recommended SFP+ transceivers with RJ45 interface (ROACH 2)
Hi All, We are new to using ROACH boards and currently we need to to configure the network cards (Mezzanine) such that we can transmit data at 10G between two ROACH2 boards. We need to know the following, 1. What is the recmmended SFP+ tranceiver (copper) with RJ45 interface to be used in a mezzanine card and compatible with ROACH2? 2. Where can we buy it? 3. Can we use an ordinary copper cable (Cat6e/Cat7) or do we have to use a specific Direct-attachched copper cable for this purpose? If so what do you recommend? Thank you Vishwa
Re: [casper] Timing distribution over fiber
Hi John, Thanks for the info. I'll add Litelink to my list of suppliers to investigate. We have no particular urge to multiplex the signals on to the fiber unless there's a particularly neat/cheap solution to do that. There's no great appetite to go custom. We've got about ~30 nodes, and my first stab at getting an off-the-shelf solution turned up at a few k$ / node, not including any cleanup electronics. Thanks again, Jack On Mon, 4 May 2015 at 19:25 John Ford jf...@nrao.edu wrote: Hi CASPERites, For HERA, we're looking at distributing timing signals (PPS 10Mhz ref or 500 MHz clock) over O(100m) fibers to various digitization nodes. I figure some folks in CASPERland have experience with this kind of system? Did you use custom RF-over-fiber kit, or off-the-shelf PPS/10MHz solutions? Any words of wisdom/caution to share? Any responses much appreciated! We have several different schemes for the different signals. Are you planning for one fiber per signal per node? or one fiber with the signals multiplexed on them? If the signals are one per signal, you can use some off-the-shelf solutions, but they are kind of pricey, and if you have a lot of nodes to supply, it might be worth working on something custom. We have used Math Associates stuff for this kind of work. Math Associates is now litelink, and they tout the affordability of their stuff, so maybe it's reasonable... On the 10 MHz, we send the 10 MHz reference over fiber, and at the far end use a crystal oscillator locked to the reference to clean up the noise from the fiber electronics. This is essential for interferometry, but maybe not for single-dish use. John Jack
Re: [casper] Timing distribution over fiber
Hi Jack and John, I wanted to add an input hereā¦.. I am working on a 10 MHz GPS slaved reference for my personal use. I am working with a Analog Devices AD9548 Evaluation board (~$250) , GPS with 1 PPS, and a ovenized 10 MHz osc. I also plan to distribute this clock and have considered the Avago fiber product line. One of the older generation Avago fiber parts should work fine for $25 per channel. With careful control of lengths and delays it should be possible to maintain good phasing between channels. The analog devices chip is $50 so a custom solution should be $500/reference but with considerable development time. Bob Stricklin On May 4, 2015, at 10:02 PM, Jack Hickish jackhick...@gmail.commailto:jackhick...@gmail.com wrote: Hi John, Thanks for the info. I'll add Litelink to my list of suppliers to investigate. We have no particular urge to multiplex the signals on to the fiber unless there's a particularly neat/cheap solution to do that. There's no great appetite to go custom. We've got about ~30 nodes, and my first stab at getting an off-the-shelf solution turned up at a few k$ / node, not including any cleanup electronics. Thanks again, Jack On Mon, 4 May 2015 at 19:25 John Ford jf...@nrao.edumailto:jf...@nrao.edu wrote: Hi CASPERites, For HERA, we're looking at distributing timing signals (PPS 10Mhz ref or 500 MHz clock) over O(100m) fibers to various digitization nodes. I figure some folks in CASPERland have experience with this kind of system? Did you use custom RF-over-fiber kit, or off-the-shelf PPS/10MHz solutions? Any words of wisdom/caution to share? Any responses much appreciated! We have several different schemes for the different signals. Are you planning for one fiber per signal per node? or one fiber with the signals multiplexed on them? If the signals are one per signal, you can use some off-the-shelf solutions, but they are kind of pricey, and if you have a lot of nodes to supply, it might be worth working on something custom. We have used Math Associates stuff for this kind of work. Math Associates is now litelink, and they tout the affordability of their stuff, so maybe it's reasonable... On the 10 MHz, we send the 10 MHz reference over fiber, and at the far end use a crystal oscillator locked to the reference to clean up the noise from the fiber electronics. This is essential for interferometry, but maybe not for single-dish use. John Jack
Re: [casper] Timing error in dac_mkid or adc_mkid blocks
Simon, I think you'll find that the timing error has been ignored in the past. John I have a timing error when I try and compile firmware containing the dac_mkid and adc_mkid yellow blocks and a LUT. I stripped out most of the code in the original bof file to just leave those blocks and still got the same errors). When compiling on a 64 bit linux system for a roach 1/sx95t I get the following error message: PAR could not meet all timing constraints. A bitstream will not be generated. To disable the PAR timing check: 1 Disable the Treat timing closure failure as error option from the Project Options dialog in XPS. Further back in the mat lab output is: -- Constraint|Check| Worst Case | Best Case | Timing | Timing | |Slack | Achievable | Errors |Score -- * PERIOD analysis for net mba15_srd1_adc_m | SETUP | 1.526ns| 2.380ns| 0| 0 kid/mba15_srd1_adc_mkid/dcm_clk derived | HOLD| -0.104ns|| 10160| 239632 from NET mba15_srd1_adc_mkid/mba15_srd1 | MINPERIOD | -0.093ns| 3.999ns| 1| 93 _adc_mkid/drdy_clk PERIOD = 3.9062 ns HI | | ||| GH 50% duty cycle corrected to 3.906 nS | | ||| HIGH 1.953 nS| | ||| -- * TS_mba15_srd1_adc_mkid_mba15_srd1_adc_mki | MINPERIOD | -0.093ns| 3.999ns| 1| 93 d_dcm_clk_0 = PERIOD TIMEGRP mba15_srd1_ | | ||| adc_mkid_mba15_srd1_adc_mkid_dcm_clk_0 T | | ||| S_adcmkid1_DRDY_I_n HIGH 50% | | ||| -- * TS_mba15_srd1_adc_mkid_mba15_srd1_adc_mki | MINPERIOD | -0.093ns| 3.999ns| 1| 93 d_dcm_clk = PERIOD TIMEGRP mba15_srd1_ad | | ||| c_mkid_mba15_srd1_adc_mkid_dcm_clk TS_ad | | ||| cmkid1_DRDY_I_p HIGH 50% | | ||| -- As far as I know this firmware has been compiled before - on the other hand it is possible that the timing error has just been ignored however that does not seem the safest of options. Has anyone else seen this problem? I've looked at adding delays in all sorts of places but so far no luck.